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ARC: [plat-hsdk]: Set initial core pll output frequency
authorEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Sat, 9 Dec 2017 13:59:15 +0000 (16:59 +0300)
committerVineet Gupta <vgupta@synopsys.com>
Wed, 20 Dec 2017 20:41:44 +0000 (12:41 -0800)
commit1690f0b236b31ee233825d8c61336032dac98b9d
tree904c7baed42e96d959eaaa26c943abf4b95ee0c8tree | snapshot
parent36a151de228df880197c88e5edeaa78d896a3ab3commit | diff
ARC: [plat-hsdk]: Set initial core pll output frequency

Set initial core pll output frequency specified in device tree to
1GHz. It will be applied at the core pll driver probing.

Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
arch/arc/boot/dts/hsdk.dts diff | blob | history
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