]> git.baikalelectronics.ru Git - kernel.git/commit
clk: sunxi: fix A20 PLL4 calculation
authorEmilio López <emilio@elopez.com.ar>
Wed, 19 Mar 2014 18:19:30 +0000 (15:19 -0300)
committerMike Turquette <mturquette@linaro.org>
Wed, 19 Mar 2014 19:34:39 +0000 (12:34 -0700)
commit150effeebe0109a7246e8157b5bf8a691ce71988
tree0c77dedaf00ce88154de9320cc2a93e0ed44f195
parent86821596fcf30ecc758af7bae2629673d6095d57
clk: sunxi: fix A20 PLL4 calculation

Allwinner actually reworked the PLL4 on A20; now it's compatible with
the sun4i PLL5/6 design previous to any divisions, as well as to the new
PLL8 in sun7i.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
drivers/clk/sunxi/clk-sunxi.c