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ARCv2: spinlock/rwlock/atomics: reduce 1 instruction in exponential backoff
authorVineet Gupta <vgupta@synopsys.com>
Fri, 7 Aug 2015 07:31:39 +0000 (13:01 +0530)
committerVineet Gupta <vgupta@synopsys.com>
Fri, 7 Aug 2015 08:26:16 +0000 (13:56 +0530)
commit1499ae02f113693481c7d6f48f3463c81b7305f8
treeb210f8710277b0ae74ea5c8143c3c9f6b5dc5bd1tree | snapshot
parent84085114f12de87230dca9d11b9f160ff3ae55e3commit | diff
ARCv2: spinlock/rwlock/atomics: reduce 1 instruction in exponential backoff

The increment of delay counter was 2 instructions:
Arithmatic Shfit Left (ASL) + set to 1 on overflow

This can be done in 1 using ROtate Left (ROL)

Suggested-by: Nigel Topham <ntopham@synopsys.com>
Cc: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
arch/arc/include/asm/atomic.h diff | blob | history
arch/arc/include/asm/spinlock.h diff | blob | history
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