]> git.baikalelectronics.ru Git - kernel.git/commit
powerpc: Disable HFSCR[TM] if TM is not supported
authorBenjamin Herrenschmidt <benh@kernel.crashing.org>
Mon, 20 Mar 2017 06:49:03 +0000 (17:49 +1100)
committerMichael Ellerman <mpe@ellerman.id.au>
Tue, 28 Mar 2017 08:52:37 +0000 (19:52 +1100)
commit12a1f7d9df73deef4674dfb75b5564d5c30a1058
tree7a4e1581e6a698ce488d00d53f348d704e5da7e6
parentfdf238ac7c5e448f9a6e1c78a9d50dbc056c7c65
powerpc: Disable HFSCR[TM] if TM is not supported

On Power8 & Power9 the early CPU inititialisation in __init_HFSCR()
turns on HFSCR[TM] (Hypervisor Facility Status and Control Register
[Transactional Memory]), but that doesn't take into account that TM
might be disabled by CPU features, or disabled by the kernel being built
with CONFIG_PPC_TRANSACTIONAL_MEM=n.

So later in boot, when we have setup the CPU features, clear HSCR[TM] if
the TM CPU feature has been disabled. We use CPU_FTR_TM_COMP to account
for the CONFIG_PPC_TRANSACTIONAL_MEM=n case.

Without this a KVM guest might try use TM, even if told not to, and
cause an oops in the host kernel. Typically the oops is seen in
__kvmppc_vcore_entry() and may or may not be fatal to the host, but is
always bad news.

In practice all shipping CPU revisions do support TM, and all host
kernels we are aware of build with TM support enabled, so no one should
actually be able to hit this in the wild.

Fixes: 6380ae1d9c1a ("powerpc: Setup in HFSCR for POWER8")
Cc: stable@vger.kernel.org # v3.10+
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Tested-by: Sam Bobroff <sam.bobroff@au1.ibm.com>
[mpe: Rewrite change log with input from Sam, add Fixes/stable]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/kernel/setup_64.c