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(parent: 0e20b76) | patch
drm/i915/display/adl_p: Implement Wa_22012278275
authorJosé Roberto de Souza <jose.souza@intel.com>
Wed, 16 Jun 2021 20:31:54 +0000 (13:31 -0700)
committerJosé Roberto de Souza <jose.souza@intel.com>
Thu, 24 Jun 2021 23:01:41 +0000 (16:01 -0700)
commit061093d75ae36ba0156eb3b3b1f9cc2e35e9351d
tree03f26d5c1333251d9c44251e13f9532b912458a9tree | snapshot
parent0e20b769c4b3347b68c7c388ce5b758dcc7d141acommit | diff
drm/i915/display/adl_p: Implement Wa_22012278275

The PSR2_CTL io buffer wake and fast wake values do not match
expected in pre production hardware, so here adding a table that
matches with HW to program it with values that HW expect.

Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210616203158.118111-2-jose.souza@intel.com
drivers/gpu/drm/i915/display/intel_psr.c diff | blob | history
drivers/gpu/drm/i915/i915_reg.h diff | blob | history
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