]> git.baikalelectronics.ru Git - kernel.git/commit
projects / kernel.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 1a9cb53) | patch
net: mvpp2: replace MVPP2_CPU_D_CACHE_LINE_SIZE with L1_CACHE_BYTES
authorJisheng Zhang <jszhang@marvell.com>
Wed, 30 Mar 2016 11:53:41 +0000 (19:53 +0800)
committerDavid S. Miller <davem@davemloft.net>
Thu, 31 Mar 2016 19:15:01 +0000 (15:15 -0400)
commit04bebe7d79d2868bf922c420632d4d895f7bac05
tree575b50e44f64c2bb478199db773e15b7d376df20tree | snapshot
parent1a9cb536e4f5f65207f211b3e124ded5748ef1adcommit | diff
net: mvpp2: replace MVPP2_CPU_D_CACHE_LINE_SIZE with L1_CACHE_BYTES

The mvpp2 ip maybe used in SoCs which may have have 64bytes cacheline
size. Replace the MVPP2_CPU_D_CACHE_LINE_SIZE with L1_CACHE_BYTES.

And since dma_alloc_coherent() is always cacheline size aligned, so
remove the align checks.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/marvell/mvpp2.c diff | blob | history
Linux Kernel Source Tree.