]> git.baikalelectronics.ru Git - uboot.git/commit
riscv: Add a SYSCON driver for Andestech's PLIC
authorRick Chen <rick@andestech.com>
Tue, 2 Apr 2019 07:56:39 +0000 (15:56 +0800)
committerAndes <uboot@andestech.com>
Mon, 8 Apr 2019 01:45:08 +0000 (09:45 +0800)
commit044f8a6b339f4923d500716c44b8e6525fb46320
treeb48b25b552a66db5d7e92dd23bdacf82484ddd41
parent95bbf13f6d2d4e0889f5634ecdedb1d476412c0c
riscv: Add a SYSCON driver for Andestech's PLIC

The Platform-Level Interrupt Controller (PLIC)
block holds memory-mapped claim and pending registers
associated with software interrupt. It is required
for handling IPI.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
arch/riscv/Kconfig
arch/riscv/include/asm/global_data.h
arch/riscv/include/asm/syscon.h
arch/riscv/lib/Makefile
arch/riscv/lib/andes_plic.c [new file with mode: 0644]