RISC-V: PolarFire SoC Device Tree Updates

RISC-V: PolarFire SoC Device Tree Updates

This add a device tree for Sundance Polarberry, along with various
cleanups to the PolarFire SOC device trees and bindings.

Link: https://lore.kernel.org/r/20220509142610.128590-1-conor.dooley@microchip.com
* 'riscv-pfsoc-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/palmer/linux:
  riscv: dts: icicle: sort nodes alphabetically
  riscv: microchip: icicle: readability fixes
  riscv: dts: microchip: add the sundance polarberry
  dt-bindings: riscv: microchip: add polarberry compatible string
  dt-bindings: vendor-prefixes: add Sundance DSP
  riscv: dts: microchip: make the fabric dtsi board specific
  dt-bindings: riscv: microchip: document icicle reference design
  riscv: dts: microchip: remove soc vendor from filenames
  riscv: dts: microchip: move sysctrlr out of soc bus
  riscv: dts: microchip: remove icicle memory clocks