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(parent: 6e02cae) | patch
MIPS: MIPSxx SC: Avoid destructive invalidation on partial L2 cachelines.
authorKevin Cernekee <cernekee@gmail.com>
Sat, 19 Sep 2009 02:12:45 +0000 (19:12 -0700)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 30 Sep 2009 19:47:00 +0000 (21:47 +0200)
commit0216574e0100ea317b2e62ea3fd1050b17fc514c
treeda15ecb8a3c728af409fa0903f292731c358e222tree | snapshot
parent6e02cae548781f73fd14dc493a38920b38d00947commit | diff
MIPS: MIPSxx SC: Avoid destructive invalidation on partial L2 cachelines.

This extends commit 7caced135638372a77f92ba15e195ca5d532a2f8 to cover
MIPSxx-style board cache code.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/mm/sc-mips.c diff | blob | history
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