]> git.baikalelectronics.ru Git - kernel.git/commit
drm/i915/gtt: Rename i915_vm_is_48b to i915_vm_is_4lvl
authorChris Wilson <chris@chris-wilson.co.uk>
Thu, 14 Mar 2019 22:38:38 +0000 (22:38 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Fri, 15 Mar 2019 09:04:54 +0000 (09:04 +0000)
commit014673d4a3514f1250369ad266398925f15b2bda
tree718b04738aeba4872ed0a5df0fd80178d3f1b937
parent69838601c34d706b716873a29edd35f3f457552f
drm/i915/gtt: Rename i915_vm_is_48b to i915_vm_is_4lvl

Large ppGTT are differentiated by the requirement to go to four levels
to address more than 32b. Given the introduction of more 4 level ppGTT
with different sizes of addressable bits, rename i915_vm_is_48b() to
better reflect the commonality of using 4 levels.

Based on a patch by Bob Paauwe.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Bob Paauwe <bob.j.paauwe@intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190314223839.28258-4-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/gvt/scheduler.c
drivers/gpu/drm/i915/i915_gem_context.c
drivers/gpu/drm/i915/i915_gem_gtt.c
drivers/gpu/drm/i915/i915_gem_gtt.h
drivers/gpu/drm/i915/intel_lrc.c
drivers/gpu/drm/i915/selftests/huge_pages.c