From ff8767cbfc2bb851a2f6cc32fbe3693ddbfb7d12 Mon Sep 17 00:00:00 2001 From: Nicolas Le Bayon Date: Fri, 25 Sep 2020 17:25:09 +0200 Subject: [PATCH] feat(stm32mp1-fdts): add nvmem_layout node and OTP definitions A new nvmem_layout node includes nvmem platform-dependent layout information, such as OTP NVMEM cell lists (phandle, name). This list allows easy access to OTP offsets defined in BSEC node, where more OTP definitions with offsets in bytes and length have been added (replace hard-coded values). Each board may redefine this list, especially for board_id info. Change-Id: I910ae671b3bf3320ee6500fecc9ec335ae67bbda Signed-off-by: Nicolas Le Bayon Signed-off-by: Yann Gautier --- fdts/stm32mp151.dtsi | 50 ++++++++++++++++++++++++++++++++++++++- fdts/stm32mp157c-ed1.dts | 22 ++++++++++++++++- fdts/stm32mp15xx-dkx.dtsi | 22 ++++++++++++++++- 3 files changed, 91 insertions(+), 3 deletions(-) diff --git a/fdts/stm32mp151.dtsi b/fdts/stm32mp151.dtsi index ca93f0c35..454e12471 100644 --- a/fdts/stm32mp151.dtsi +++ b/fdts/stm32mp151.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) /* - * Copyright (c) 2017-2021, STMicroelectronics - All Rights Reserved + * Copyright (c) 2017-2022, STMicroelectronics - All Rights Reserved * Author: Ludovic Barre for STMicroelectronics. */ #include @@ -19,9 +19,31 @@ compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <0>; + nvmem-cells = <&part_number_otp>; + nvmem-cell-names = "part_number"; }; }; + nvmem_layout: nvmem_layout@0 { + compatible = "st,stm32-nvmem-layout"; + + nvmem-cells = <&cfg0_otp>, + <&part_number_otp>, + <&monotonic_otp>, + <&nand_otp>, + <&uid_otp>, + <&package_otp>, + <&hw2_otp>; + + nvmem-cell-names = "cfg0_otp", + "part_number_otp", + "monotonic_otp", + "nand_otp", + "uid_otp", + "package_otp", + "hw2_otp"; + }; + psci { compatible = "arm,psci-1.0"; method = "smc"; @@ -457,12 +479,38 @@ reg = <0x5c005000 0x400>; #address-cells = <1>; #size-cells = <1>; + + cfg0_otp: cfg0_otp@0 { + reg = <0x0 0x1>; + }; + part_number_otp: part_number_otp@4 { + reg = <0x4 0x1>; + }; + monotonic_otp: monotonic_otp@10 { + reg = <0x10 0x4>; + }; + nand_otp: nand_otp@24 { + reg = <0x24 0x4>; + }; + uid_otp: uid_otp@34 { + reg = <0x34 0xc>; + }; + package_otp: package_otp@40 { + reg = <0x40 0x4>; + }; + hw2_otp: hw2_otp@48 { + reg = <0x48 0x4>; + }; ts_cal1: calib@5c { reg = <0x5c 0x2>; }; ts_cal2: calib@5e { reg = <0x5e 0x2>; }; + mac_addr: mac_addr@e4 { + reg = <0xe4 0x8>; + st,non-secure-otp; + }; }; etzpc: etzpc@5c007000 { diff --git a/fdts/stm32mp157c-ed1.dts b/fdts/stm32mp157c-ed1.dts index 5c9818fab..2de90d8c4 100644 --- a/fdts/stm32mp157c-ed1.dts +++ b/fdts/stm32mp157c-ed1.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) /* - * Copyright (c) 2017-2021, STMicroelectronics - All Rights Reserved + * Copyright (c) 2017-2022, STMicroelectronics - All Rights Reserved * Author: Ludovic Barre for STMicroelectronics. */ /dts-v1/; @@ -196,6 +196,26 @@ status = "okay"; }; +&nvmem_layout { + nvmem-cells = <&cfg0_otp>, + <&part_number_otp>, + <&monotonic_otp>, + <&nand_otp>, + <&uid_otp>, + <&package_otp>, + <&hw2_otp>, + <&board_id>; + + nvmem-cell-names = "cfg0_otp", + "part_number_otp", + "monotonic_otp", + "nand_otp", + "uid_otp", + "package_otp", + "hw2_otp", + "board_id"; +}; + &pwr_regulators { vdd-supply = <&vdd>; vdd_3v3_usbfs-supply = <&vdd_usb>; diff --git a/fdts/stm32mp15xx-dkx.dtsi b/fdts/stm32mp15xx-dkx.dtsi index 975d749d4..2eb3a5796 100644 --- a/fdts/stm32mp15xx-dkx.dtsi +++ b/fdts/stm32mp15xx-dkx.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) /* - * Copyright (c) 2019-2021, STMicroelectronics - All Rights Reserved + * Copyright (c) 2019-2022, STMicroelectronics - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. */ @@ -183,6 +183,26 @@ secure-status = "okay"; }; +&nvmem_layout { + nvmem-cells = <&cfg0_otp>, + <&part_number_otp>, + <&monotonic_otp>, + <&nand_otp>, + <&uid_otp>, + <&package_otp>, + <&hw2_otp>, + <&board_id>; + + nvmem-cell-names = "cfg0_otp", + "part_number_otp", + "monotonic_otp", + "nand_otp", + "uid_otp", + "package_otp", + "hw2_otp", + "board_id"; +}; + &pwr_regulators { vdd-supply = <&vdd>; vdd_3v3_usbfs-supply = <&vdd_usb>; -- 2.39.5