From f1fe1440db197d514b5484e780cfb90f504c62b9 Mon Sep 17 00:00:00 2001 From: Pranav Madhu Date: Wed, 27 Jul 2022 13:12:27 +0530 Subject: [PATCH] feat(plat/arm/css): add interrupt handler for reboot request Add platform specific interrupt handler for handling the reboot of all CPU's. On shutdown/reboot, only one CPU invoke PSCI and enter into trusted firmware. The CPU which entered trusted firmware signals the rest of the cores which are online using SGI to initiate power down sequence. On receiving the SGI, the handler will power down the GIC redistributor interface of the respective core, configure the power control register and power down the CPU by executing wfi. In addition to these changes, fix coding style issues that are not directly related to the code being introduced in this patch. Change-Id: I4917dfdc47be5ce7367bee629486a6344cdd706f Signed-off-by: Pranav Madhu --- include/plat/arm/css/common/css_pm.h | 2 ++ plat/arm/css/common/css_pm.c | 34 +++++++++++++++++++++++++++- 2 files changed, 35 insertions(+), 1 deletion(-) diff --git a/include/plat/arm/css/common/css_pm.h b/include/plat/arm/css/common/css_pm.h index 45f2c084b..84e6b38de 100644 --- a/include/plat/arm/css/common/css_pm.h +++ b/include/plat/arm/css/common/css_pm.h @@ -41,6 +41,8 @@ void css_cpu_standby(plat_local_state_t cpu_state); void css_get_sys_suspend_power_state(psci_power_state_t *req_state); int css_node_hw_state(u_register_t mpidr, unsigned int power_level); void css_setup_cpu_pwr_down_intr(void); +int css_reboot_interrupt_handler(uint32_t intr_raw, uint32_t flags, + void *handle, void *cookie); /* * This mapping array has to be exported by the platform. Each element at diff --git a/plat/arm/css/common/css_pm.c b/plat/arm/css/common/css_pm.c index f4d3b4a59..9b2639c35 100644 --- a/plat/arm/css/common/css_pm.c +++ b/plat/arm/css/common/css_pm.c @@ -14,10 +14,11 @@ #include #include #include -#include #include +#include + /* Allow CSS platforms to override `plat_arm_psci_pm_ops` */ #pragma weak plat_arm_psci_pm_ops @@ -352,6 +353,37 @@ void css_setup_cpu_pwr_down_intr(void) #endif } +/* + * For a graceful shutdown/reboot, each CPU in the system should do their power + * down sequence. On a PSCI shutdown/reboot request, only one CPU gets an + * opportunity to do the powerdown sequence. To achieve graceful reset, of all + * cores in the system, the CPU gets the opportunity raise warm reboot SGI to + * rest of the CPUs which are online. Add handler for the reboot SGI where the + * rest of the CPU execute the powerdown sequence. + */ +int css_reboot_interrupt_handler(uint32_t intr_raw, uint32_t flags, + void *handle, void *cookie) +{ + assert(intr_raw == CSS_CPU_PWR_DOWN_REQ_INTR); + + /* Deactivate warm reboot SGI */ + plat_ic_end_of_interrupt(CSS_CPU_PWR_DOWN_REQ_INTR); + + /* + * Disable GIC CPU interface to prevent pending interrupt from waking + * up the AP from WFI. + */ + plat_arm_gic_cpuif_disable(); + plat_arm_gic_redistif_off(); + + psci_pwrdown_cpu(PLAT_MAX_PWR_LVL); + + dmbsy(); + + wfi(); + return 0; +} + /******************************************************************************* * Export the platform handlers via plat_arm_psci_pm_ops. The ARM Standard * platform will take care of registering the handlers with PSCI. -- 2.39.5