From ee21709e98a9e0f60a46d79caf5b702a0b7941cc Mon Sep 17 00:00:00 2001 From: Yann Gautier Date: Fri, 25 Nov 2022 11:37:00 +0100 Subject: [PATCH] fix(st-clock): give the size for parent_mp13 and dividers_mp13 tables This corrects MISRA C2012-9.5: Where designated initializers are used to initialize an array object the size of the array shall be specified explicitly. Signed-off-by: Yann Gautier Change-Id: I4c331b0225af975fd022ffe9e5fd1d536ed59879 --- drivers/st/clk/clk-stm32mp13.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/st/clk/clk-stm32mp13.c b/drivers/st/clk/clk-stm32mp13.c index 05e9ad75e..faccfd4ea 100644 --- a/drivers/st/clk/clk-stm32mp13.c +++ b/drivers/st/clk/clk-stm32mp13.c @@ -456,7 +456,7 @@ static const uint16_t SAES_src[] = { },\ } -static const struct parent_cfg parent_mp13[] = { +static const struct parent_cfg parent_mp13[MUX_MAX] = { MUX_CFG(MUX_ADC1, ADC1_src, RCC_ADC12CKSELR, 0, 2), MUX_CFG(MUX_ADC2, ADC2_src, RCC_ADC12CKSELR, 2, 2), MUX_RDY_CFG(MUX_AXI, AXI_src, RCC_ASSCKSELR, 0, 3), @@ -841,7 +841,7 @@ static const struct clk_div_table apb_div_table[] = { .bitrdy = _bitrdy,\ } -static const struct div_cfg dividers_mp13[] = { +static const struct div_cfg dividers_mp13[DIV_MAX] = { DIV_CFG(DIV_PLL1DIVP, RCC_PLL1CFGR2, 0, 7, 0, NULL, DIV_NO_BIT_RDY), DIV_CFG(DIV_PLL2DIVP, RCC_PLL2CFGR2, 0, 7, 0, NULL, DIV_NO_BIT_RDY), DIV_CFG(DIV_PLL2DIVQ, RCC_PLL2CFGR2, 8, 7, 0, NULL, DIV_NO_BIT_RDY), -- 2.39.5