From e6c038909193b83bc293de9b1eb65440e75f8c91 Mon Sep 17 00:00:00 2001 From: Jit Loon Lim Date: Thu, 16 Jun 2022 22:54:01 +0200 Subject: [PATCH] fix(intel): fix pinmux handoff bug on Agilex Incorrect number of FPGA pinmux registers was copied from handoff data. This caused pinmux_emac0_usefpga register to always be zero meaning "EMAC0 uses HPS IO Pins" even if handoff data for this register was one meaning "EMAC0 uses the FPGA Inteface". Signed-off-by: Jit Loon Lim Change-Id: Ia0bd832c61d25f66ef13f39fe28b054cb96af9a1 --- plat/intel/soc/agilex/soc/agilex_pinmux.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/plat/intel/soc/agilex/soc/agilex_pinmux.c b/plat/intel/soc/agilex/soc/agilex_pinmux.c index 0b908cfa3..2367c21c7 100644 --- a/plat/intel/soc/agilex/soc/agilex_pinmux.c +++ b/plat/intel/soc/agilex/soc/agilex_pinmux.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, Intel Corporation. All rights reserved. + * Copyright (c) 2019-2022, Intel Corporation. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -208,7 +208,7 @@ void config_pinmux(handoff *hoff_ptr) hoff_ptr->pinmux_io_array[i+1]); } - for (i = 0; i < 42; i += 2) { + for (i = 0; i < 40; i += 2) { mmio_write_32(AGX_PINMUX_PINMUX_EMAC0_USEFPGA + hoff_ptr->pinmux_fpga_array[i], hoff_ptr->pinmux_fpga_array[i+1]); -- 2.39.5