From d5f225d95d3dc7473340ffebfcb9068b54f91a17 Mon Sep 17 00:00:00 2001 From: Manish V Badarkhe Date: Mon, 4 Jul 2022 14:51:07 +0100 Subject: [PATCH] feat(fvp): add plat API to validate that passed region is non-secure Added a platform function to check passed region is within the Non-Secure region of DRAM. Signed-off-by: Manish V Badarkhe Change-Id: Ie5808fa6a1b6e6bc99f4185fa8acc52af0d5f14d --- include/plat/common/plat_drtm.h | 7 ++++++ plat/arm/board/fvp/fvp_drtm_addr.c | 36 ++++++++++++++++++++++++++++++ 2 files changed, 43 insertions(+) create mode 100644 plat/arm/board/fvp/fvp_drtm_addr.c diff --git a/include/plat/common/plat_drtm.h b/include/plat/common/plat_drtm.h index 754fa1a40..e96e71958 100644 --- a/include/plat/common/plat_drtm.h +++ b/include/plat/common/plat_drtm.h @@ -64,4 +64,11 @@ uint64_t plat_drtm_get_tcb_hash_features(void); int plat_set_drtm_error(uint64_t error_code); int plat_get_drtm_error(uint64_t *error_code); +/* + * Platform-specific function to ensure passed region lies within + * Non-Secure region of DRAM + */ +int plat_drtm_validate_ns_region(uintptr_t region_start, + size_t region_size); + #endif /* PLAT_DRTM_H */ diff --git a/plat/arm/board/fvp/fvp_drtm_addr.c b/plat/arm/board/fvp/fvp_drtm_addr.c new file mode 100644 index 000000000..eeaa3425b --- /dev/null +++ b/plat/arm/board/fvp/fvp_drtm_addr.c @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2022 Arm Limited. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + * + */ + +#include + +#include +#include + +/******************************************************************************* + * Check passed region is within Non-Secure region of DRAM + ******************************************************************************/ +int plat_drtm_validate_ns_region(uintptr_t region_start, + size_t region_size) +{ + uintptr_t region_end = region_start + region_size - 1; + + if (region_start >= region_end) { + return -1; + } else if ((region_start >= ARM_NS_DRAM1_BASE) && + (region_start < (ARM_NS_DRAM1_BASE + ARM_NS_DRAM1_SIZE)) && + (region_end >= ARM_NS_DRAM1_BASE) && + (region_end < (ARM_NS_DRAM1_BASE + ARM_NS_DRAM1_SIZE))) { + return 0; + } else if ((region_start >= ARM_DRAM2_BASE) && + (region_start < (ARM_DRAM2_BASE + ARM_DRAM2_SIZE)) && + (region_end >= ARM_DRAM2_BASE) && + (region_end < (ARM_DRAM2_BASE + ARM_DRAM2_SIZE))) { + return 0; + } + + return -1; +} -- 2.39.5