From be1a1d74554d0c19a3ad882ace66a3ca7f346aed Mon Sep 17 00:00:00 2001 From: hersen wu Date: Wed, 22 May 2019 10:57:40 -0400 Subject: [PATCH] drm/amd/powerplay: allow dc request uclk change when dc set mode or color format in frame buffer change, it may request clock changes, like dispclk, dcfclk, uclk. after smu get clock requests, smu will make decision. Signed-off-by: hersen wu Reviewed-by: Huang Rui Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c index 63246fa083adb..c9d0992d94a7d 100644 --- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c @@ -1277,8 +1277,9 @@ smu_v11_0_display_clock_voltage_request(struct smu_context *smu, if (!smu->pm_enabled) return -EINVAL; + if (smu_feature_is_enabled(smu, SMU_FEATURE_DPM_DCEFCLK_BIT) || - smu_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { + smu_feature_is_enabled(smu, SMU_FEATURE_DPM_UCLK_BIT)) { switch (clk_type) { case amd_pp_dcef_clock: clk_select = SMU_DCEFCLK; -- 2.39.5