From 95ed9a9e0dd32710ed6845a24478bbe1bb9fd91a Mon Sep 17 00:00:00 2001 From: johpow01 Date: Thu, 12 Nov 2020 13:32:00 -0600 Subject: [PATCH] Revert workaround for A76 erratum 1800710 This errata workaround did not work as intended and was revised in subsequent SDEN releases so we are reverting this change. This is the patch being reverted: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/4684 Signed-off-by: John Powell Change-Id: I560749a5b55e22fbe49d3f428a8b9545d6bdaaf0 --- docs/design/cpu-specific-build-macros.rst | 3 -- include/lib/cpus/aarch64/cortex_a76.h | 1 - lib/cpus/aarch64/cortex_a76.S | 35 ----------------------- lib/cpus/cpu-ops.mk | 8 ------ 4 files changed, 47 deletions(-) diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index c976b8b3a..5f3d69948 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -241,9 +241,6 @@ For Cortex-A76, the following errata build flags are defined : - ``ERRATA_A76_1791580``: This applies errata 1791580 workaround to Cortex-A76 CPU. This needs to be enabled only for revision <= r4p0 of the CPU. -- ``ERRATA_A76_1800710``: This applies errata 1800710 workaround to Cortex-A76 - CPU. This needs to be enabled only for revision <= r4p0 of the CPU. - - ``ERRATA_A76_1165522``: This applies errata 1165522 workaround to all revisions of Cortex-A76 CPU. This errata is fixed in r3p0 but due to limitation of errata framework this errata is applied to all revisions diff --git a/include/lib/cpus/aarch64/cortex_a76.h b/include/lib/cpus/aarch64/cortex_a76.h index b522e8e11..a61825f1b 100644 --- a/include/lib/cpus/aarch64/cortex_a76.h +++ b/include/lib/cpus/aarch64/cortex_a76.h @@ -20,7 +20,6 @@ #define CORTEX_A76_CPUECTLR_EL1_WS_THR_L2 (ULL(3) << 24) #define CORTEX_A76_CPUECTLR_EL1_BIT_51 (ULL(1) << 51) -#define CORTEX_A76_CPUECTLR_EL1_BIT_53 (ULL(1) << 53) /******************************************************************************* * CPU Auxiliary Control register specific definitions. diff --git a/lib/cpus/aarch64/cortex_a76.S b/lib/cpus/aarch64/cortex_a76.S index 98a11832d..2c99cdc92 100644 --- a/lib/cpus/aarch64/cortex_a76.S +++ b/lib/cpus/aarch64/cortex_a76.S @@ -381,35 +381,6 @@ func check_errata_1791580 b cpu_rev_var_ls endfunc check_errata_1791580 - /* -------------------------------------------------- - * Errata Workaround for Cortex A76 Errata #1800710. - * This applies to revision <= r4p0 of Cortex A76. - * Inputs: - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x17 - * -------------------------------------------------- - */ -func errata_a76_1800710_wa - /* Compare x0 against revision <= r4p0 */ - mov x17, x30 - bl check_errata_1800710 - cbz x0, 1f - - /* Disable allocation of splintered pages in the L2 TLB */ - mrs x1, CORTEX_A76_CPUECTLR_EL1 - orr x1, x1, CORTEX_A76_CPUECTLR_EL1_BIT_53 - msr CORTEX_A76_CPUECTLR_EL1, x1 - isb -1: - ret x17 -endfunc errata_a76_1800710_wa - -func check_errata_1800710 - /* Applies to everything <= r4p0 */ - mov x1, #0x40 - b cpu_rev_var_ls -endfunc check_errata_1800710 - /* -------------------------------------------------- * Errata Workaround for Cortex A76 Errata #1262606, * #1275112, and #1868343. #1262606 and #1275112 @@ -538,11 +509,6 @@ func cortex_a76_reset_func bl errata_a76_1791580_wa #endif -#if ERRATA_A76_1800710 - mov x0, x18 - bl errata_a76_1800710_wa -#endif - #if WORKAROUND_CVE_2018_3639 /* If the PE implements SSBS, we don't need the dynamic workaround */ mrs x0, id_aa64pfr1_el1 @@ -624,7 +590,6 @@ func cortex_a76_errata_report report_errata ERRATA_A76_1275112, cortex_a76, 1275112 report_errata ERRATA_A76_1286807, cortex_a76, 1286807 report_errata ERRATA_A76_1791580, cortex_a76, 1791580 - report_errata ERRATA_A76_1800710, cortex_a76, 1800710 report_errata ERRATA_A76_1165522, cortex_a76, 1165522 report_errata ERRATA_A76_1868343, cortex_a76, 1868343 report_errata WORKAROUND_CVE_2018_3639, cortex_a76, cve_2018_3639 diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index 12105388f..7575051e5 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -270,10 +270,6 @@ ERRATA_A76_1286807 ?=0 # only to revision <= r4p0 of the Cortex A76 cpu. ERRATA_A76_1791580 ?=0 -# Flag to apply erratum 1800710 workaround during reset. This erratum applies -# only to revision <= r4p0 of the Cortex A76 cpu. -ERRATA_A76_1800710 ?=0 - # Flag to apply erratum 1165522 workaround during reset. This erratum applies # to all revisions of Cortex A76 cpu. ERRATA_A76_1165522 ?=0 @@ -555,10 +551,6 @@ $(eval $(call add_define,ERRATA_A76_1286807)) $(eval $(call assert_boolean,ERRATA_A76_1791580)) $(eval $(call add_define,ERRATA_A76_1791580)) -# Process ERRATA_A76_1800710 flag -$(eval $(call assert_boolean,ERRATA_A76_1800710)) -$(eval $(call add_define,ERRATA_A76_1800710)) - # Process ERRATA_A76_1165522 flag $(eval $(call assert_boolean,ERRATA_A76_1165522)) $(eval $(call add_define,ERRATA_A76_1165522)) -- 2.39.5