From 8f9ba3f344545740fc44e90fb8322c7728ae94ec Mon Sep 17 00:00:00 2001
From: Michal Simek <michal.simek@amd.com>
Date: Thu, 9 Feb 2023 10:28:58 +0100
Subject: [PATCH] feat(zynqmp): add SMCCC_ARCH_SOC_ID support

Add support for calling SMCCC_ARCH_SOC_ID which is used by Linux soc_id
driver for printing information about manufacturer and also chip version
and silicon ID code. SOC revision is directly mapped to chip ID code.
And SOC version is composed from manufacturer ID based on JEP-106 with
chip_id which contains bits mapped to CPU register 0xffca0044 platform
bits which differentiate between silicon, qemu and other emulated
platforms.

Function description is available at
docs/getting_started/porting-guide.rst.

Change-Id: I1f19e1973593897e71b39244dbdbceb6bd0e8a07
Signed-off-by: Michal Simek <michal.simek@amd.com>
---
 plat/xilinx/common/include/plat_startup.h  |  5 ++++
 plat/xilinx/zynqmp/aarch64/zynqmp_common.c | 28 ++++++++++++++++++++++
 2 files changed, 33 insertions(+)

diff --git a/plat/xilinx/common/include/plat_startup.h b/plat/xilinx/common/include/plat_startup.h
index 1733930c9..ce356f60f 100644
--- a/plat/xilinx/common/include/plat_startup.h
+++ b/plat/xilinx/common/include/plat_startup.h
@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
+ * Copyright (C) 2023, Advanced Micro Devices, Inc. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -38,4 +39,8 @@ enum fsbl_handoff fsbl_atf_handover(entry_point_info_t *bl32,
 					entry_point_info_t *bl33,
 					uint64_t atf_handoff_addr);
 
+/* JEDEC Standard Manufacturer's Identification Code and Bank ID JEP106 */
+#define JEDEC_XILINX_MFID	U(0x49)
+#define JEDEC_XILINX_BKID	U(0)
+
 #endif /* PLAT_STARTUP_H */
diff --git a/plat/xilinx/zynqmp/aarch64/zynqmp_common.c b/plat/xilinx/zynqmp/aarch64/zynqmp_common.c
index 30af4d572..95a266e74 100644
--- a/plat/xilinx/zynqmp/aarch64/zynqmp_common.c
+++ b/plat/xilinx/zynqmp/aarch64/zynqmp_common.c
@@ -11,10 +11,13 @@
 #include <common/debug.h>
 #include <drivers/generic_delay_timer.h>
 #include <lib/mmio.h>
+#include <lib/smccc.h>
 #include <lib/xlat_tables/xlat_tables.h>
 #include <plat_ipi.h>
 #include <plat_private.h>
+#include <plat_startup.h>
 #include <plat/common/platform.h>
+#include <services/arm_arch_svc.h>
 
 #include "pm_api_sys.h"
 
@@ -311,6 +314,31 @@ static char *zynqmp_print_silicon_idcode(void)
 	return zynqmp_get_silicon_idcode_name();
 }
 
+int32_t plat_is_smccc_feature_available(u_register_t fid)
+{
+	switch (fid) {
+	case SMCCC_ARCH_SOC_ID:
+		return SMC_ARCH_CALL_SUCCESS;
+	default:
+		return SMC_ARCH_CALL_NOT_SUPPORTED;
+	}
+
+	return SMC_ARCH_CALL_NOT_SUPPORTED;
+}
+
+int32_t plat_get_soc_version(void)
+{
+	uint32_t chip_id = zynqmp_get_silicon_ver();
+	uint32_t manfid = SOC_ID_SET_JEP_106(JEDEC_XILINX_BKID, JEDEC_XILINX_MFID);
+
+	return (int32_t)(manfid | (chip_id & 0xFFFF));
+}
+
+int32_t plat_get_soc_revision(void)
+{
+	return mmio_read_32(ZYNQMP_CSU_BASEADDR + ZYNQMP_CSU_IDCODE_OFFSET);
+}
+
 static uint32_t zynqmp_get_ps_ver(void)
 {
 	uint32_t ver = mmio_read_32(ZYNQMP_CSU_BASEADDR + ZYNQMP_CSU_VERSION_OFFSET);
-- 
2.39.5