From 769446a6899d840df8aa5746ec32bf7530fc9826 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 7 Oct 2022 08:15:19 +0200 Subject: [PATCH] fix(versal): enable a72 erratum 859971 and 1319367 TF-A is reporting that above two erratum are missing to be enabled that's why enable them by default. For futher information please refer to https://developer.arm.com/documentation/epm012079/11/ where 859971 is "Speculative instruction prefetch to Execute-never (XN) memory could cause deadlock or data integrity issue" and 1319367 is "Speculative AT instruction using out-of-context translation regime could cause subsequent request to generate an incorrect translation". Change-Id: I408706713a169e53db63ac5657751b0b003e646d Signed-off-by: Michal Simek --- plat/xilinx/versal/platform.mk | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/plat/xilinx/versal/platform.mk b/plat/xilinx/versal/platform.mk index a8b2c948a..8087297a2 100644 --- a/plat/xilinx/versal/platform.mk +++ b/plat/xilinx/versal/platform.mk @@ -11,6 +11,10 @@ PL011_GENERIC_UART := 1 IPI_CRC_CHECK := 0 HARDEN_SLS_ALL := 0 +# A72 Erratum for SoC +ERRATA_A72_859971 := 1 +ERRATA_A72_1319367 := 1 + ifdef VERSAL_ATF_MEM_BASE $(eval $(call add_define,VERSAL_ATF_MEM_BASE)) -- 2.39.5