From 62a93aa7afcd022f06d322c36979f0aa02713beb Mon Sep 17 00:00:00 2001 From: Andrey Zhizhikin Date: Mon, 26 Sep 2022 22:48:56 +0200 Subject: [PATCH] feat(imx8mp): add hab and map required memory blocks In order for HAB to perform operations, memory regions has to be mapped in TF-A, which HAB ROM code would use internally. Include those memory blocks for i.MX8M+ SoC. Of a special note, the DRAM block is mapped with complete size available on the platform and uses MT_RW attributes, this is required to minimize the size of translation tables and provide a possibility to exchange the execution results between EL3 and EL1&2, see details in [1]. Link: [1]: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/16880 Signed-off-by: Andrey Zhizhikin Change-Id: I986cdce434d1ec9ea8b3c0d5599edde55b9b30f8 --- plat/imx/imx8m/imx8mp/imx8mp_bl31_setup.c | 4 +++- plat/imx/imx8m/imx8mp/include/platform_def.h | 18 ++++++++++++++++++ 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/plat/imx/imx8m/imx8mp/imx8mp_bl31_setup.c b/plat/imx/imx8m/imx8mp/imx8mp_bl31_setup.c index 34631b868..70dd8c857 100644 --- a/plat/imx/imx8m/imx8mp/imx8mp_bl31_setup.c +++ b/plat/imx/imx8m/imx8mp/imx8mp_bl31_setup.c @@ -33,7 +33,9 @@ static const mmap_region_t imx_mmap[] = { GIC_MAP, AIPS_MAP, OCRAM_S_MAP, DDRC_MAP, - NOC_MAP, {0}, + NOC_MAP, CAAM_RAM_MAP, NS_OCRAM_MAP, + ROM_MAP, DRAM_MAP, + {0}, }; static const struct aipstz_cfg aipstz[] = { diff --git a/plat/imx/imx8m/imx8mp/include/platform_def.h b/plat/imx/imx8m/imx8mp/include/platform_def.h index 8807f5d2d..1c58f48d3 100644 --- a/plat/imx/imx8m/imx8mp/include/platform_def.h +++ b/plat/imx/imx8m/imx8mp/include/platform_def.h @@ -111,6 +111,13 @@ #define IMX_DDR_IPS_BASE U(0x3d000000) #define IMX_DDR_IPS_SIZE U(0x1800000) #define IMX_ROM_BASE U(0x0) +#define IMX_ROM_SIZE U(0x40000) +#define IMX_NS_OCRAM_BASE U(0x900000) +#define IMX_NS_OCRAM_SIZE U(0x60000) +#define IMX_CAAM_RAM_BASE U(0x100000) +#define IMX_CAAM_RAM_SIZE U(0x10000) +#define IMX_DRAM_BASE U(0x40000000) +#define IMX_DRAM_SIZE U(0xc0000000) #define IMX_GIC_BASE PLAT_GICD_BASE #define IMX_GIC_SIZE U(0x200000) @@ -178,5 +185,16 @@ #define OCRAM_S_MAP MAP_REGION_FLAT(OCRAM_S_BASE, OCRAM_S_SIZE, MT_MEMORY | MT_RW) /* OCRAM_S */ #define DDRC_MAP MAP_REGION_FLAT(IMX_DDRPHY_BASE, IMX_DDR_IPS_SIZE, MT_DEVICE | MT_RW) /* DDRMIX */ #define NOC_MAP MAP_REGION_FLAT(IMX_NOC_BASE, IMX_NOC_SIZE, MT_DEVICE | MT_RW) /* NOC QoS */ +#define CAAM_RAM_MAP MAP_REGION_FLAT(IMX_CAAM_RAM_BASE, IMX_CAAM_RAM_SIZE, MT_MEMORY | MT_RW) /* CAMM RAM */ +#define NS_OCRAM_MAP MAP_REGION_FLAT(IMX_NS_OCRAM_BASE, IMX_NS_OCRAM_SIZE, MT_MEMORY | MT_RW) /* NS OCRAM */ +#define ROM_MAP MAP_REGION_FLAT(IMX_ROM_BASE, IMX_ROM_SIZE, MT_MEMORY | MT_RO) /* ROM code */ + +/* + * Note: DRAM region is mapped with entire size available and uses MT_RW + * attributes. + * See details in docs/plat/imx8m.rst "High Assurance Boot (HABv4)" section + * for explanation of this mapping scheme. + */ +#define DRAM_MAP MAP_REGION_FLAT(IMX_DRAM_BASE, IMX_DRAM_SIZE, MT_MEMORY | MT_RW | MT_NS) /* DRAM */ #endif /* platform_def.h */ -- 2.39.5