From 600f168172a9281a0061f84e4da5318e08762aa1 Mon Sep 17 00:00:00 2001 From: Allen-KH Cheng Date: Tue, 8 Nov 2022 18:40:27 +0800 Subject: [PATCH] fix(mt8186): fix the DRAM voltage after the system resumes The DRAM power supply must sustain at 0.8V after the system resumes. Otherwise, unexpected errors would occur. Therefore, we update the DRAM voltage to 0.8v in PMIC voltage wrap table. BUG=b:253537849 TEST=Suspend Resume Test Signed-off-by: Allen-KH Cheng Change-Id: Idd42d5a2d646468822e391e48d01d870c3b7f0d3 --- plat/mediatek/mt8186/drivers/spm/mt_spm_pmic_wrap.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/plat/mediatek/mt8186/drivers/spm/mt_spm_pmic_wrap.c b/plat/mediatek/mt8186/drivers/spm/mt_spm_pmic_wrap.c index 849ffb7e1..c0000ed74 100644 --- a/plat/mediatek/mt8186/drivers/spm/mt_spm_pmic_wrap.c +++ b/plat/mediatek/mt8186/drivers/spm/mt_spm_pmic_wrap.c @@ -51,10 +51,10 @@ static struct pmic_wrap_setting pw66 = { .addr = { {0UL, 0UL} }, .set[PMIC_WRAP_PHASE_ALLINONE] = { ._[CMD_0] = { BUCK_VCORE_ELR0_66, VOLT_TO_PMIC_VAL_66(80000), }, - ._[CMD_1] = { BUCK_VCORE_ELR0_66, VOLT_TO_PMIC_VAL_66(75000), }, - ._[CMD_2] = { BUCK_VCORE_ELR0_66, VOLT_TO_PMIC_VAL_66(70000), }, - ._[CMD_3] = { BUCK_VCORE_ELR0_66, VOLT_TO_PMIC_VAL_66(65000), }, - ._[CMD_4] = { BUCK_VCORE_ELR0_66, VOLT_TO_PMIC_VAL_66(60000), }, + ._[CMD_1] = { BUCK_VCORE_ELR0_66, VOLT_TO_PMIC_VAL_66(80000), }, + ._[CMD_2] = { BUCK_VCORE_ELR0_66, VOLT_TO_PMIC_VAL_66(80000), }, + ._[CMD_3] = { BUCK_VCORE_ELR0_66, VOLT_TO_PMIC_VAL_66(80000), }, + ._[CMD_4] = { BUCK_VCORE_ELR0_66, VOLT_TO_PMIC_VAL_66(80000), }, ._[CMD_5] = { TOP_SPI_CON0_66, 0x1, }, ._[CMD_6] = { TOP_SPI_CON0_66, 0x0, }, .nr_idx = NR_IDX_ALL, -- 2.39.5