From 49ae6657fc8ab9bc8ea9208cd4133e8575b47550 Mon Sep 17 00:00:00 2001 From: Shinobu Uehara Date: Mon, 21 Jul 2014 22:04:29 -0700 Subject: [PATCH] ARM: shmobile: r8a7791: Fix SD2CKCR register address b5a173dd95c0ee01f30d5fc098ca1b1c5704785b (ARM: shmobile: r8a7791: Add clocks) added r8a7791 SD clocks when v3.14. 243e4e1dd15295db9b37b7b7b345c58954d22a4f (ARM: shmobile: Add SDHI devices for Koelsch DTS) enabled SD on r8a7791 Koelsch when v3.15. 91efc3f41c582c3096c1f50345a09db48d77299f (ARM: shmobile: henninger: add SDHI0/2 DT support) enable SD on r8a7791 Henninger when v3.16. But r8a7791 SD clock had wrong address. This patch fixup it. [Kuninori Morimoto: tidyup for upstreaming] Signed-off-by: Shinobu Uehara Signed-off-by: Kuninori Morimoto Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7791.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 8d7ffaeff6e03..79f68acfd5d46 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -540,9 +540,9 @@ #clock-cells = <0>; clock-output-names = "sd1"; }; - sd2_clk: sd3_clk@e615007c { + sd2_clk: sd3_clk@e615026c { compatible = "renesas,r8a7791-div6-clock", "renesas,cpg-div6-clock"; - reg = <0 0xe615007c 0 4>; + reg = <0 0xe615026c 0 4>; clocks = <&pll1_div2_clk>; #clock-cells = <0>; clock-output-names = "sd2"; -- 2.39.5