From 416814622d949bb8805ece98fec2dc8b89c72ab9 Mon Sep 17 00:00:00 2001 From: Baikal Electronics Date: Fri, 7 Apr 2023 12:23:31 +0300 Subject: [PATCH] include/configs/baikal_mips.h: minor fixes --- include/configs/baikal_mips.h | 36 +++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/include/configs/baikal_mips.h b/include/configs/baikal_mips.h index d02205ea18..40188cf047 100644 --- a/include/configs/baikal_mips.h +++ b/include/configs/baikal_mips.h @@ -21,7 +21,7 @@ */ #ifndef __ASSEMBLER__ extern unsigned long baikal_clk_freq; -#define CONFIG_SYS_MIPS_TIMER_FREQ (baikal_clk_freq / 2) +#define CONFIG_SYS_MIPS_TIMER_FREQ (baikal_clk_freq / 2) #endif /* @@ -29,7 +29,7 @@ extern unsigned long baikal_clk_freq; * U-Boot initial parameters *----------------------------------------------- */ -#define CONFIG_SYS_BOOTPARAMS_LEN (128 << 10) /* 128 KB */ +#define CONFIG_SYS_BOOTPARAMS_LEN (128 << 10) /* 128 KB */ /* *----------------------------------------------- @@ -37,9 +37,9 @@ extern unsigned long baikal_clk_freq; *----------------------------------------------- */ /* Moved to baikal_bfk3_defconfig -#define CONFIG_SRAM_BASE 0xBBF80000 -#define CONFIG_SRAM_SIZE 0x10000 -#define CUSTOM_SYS_INIT_SP_ADDR 0xBBF90000 (CONFIG_SRAM_BASE + CONFIG_SRAM_SIZE) +#define CONFIG_SRAM_BASE 0xBBF80000 +#define CONFIG_SRAM_SIZE 0x10000 +#define CUSTOM_SYS_INIT_SP_ADDR 0xBBF90000 (CONFIG_SRAM_BASE + CONFIG_SRAM_SIZE) */ /* @@ -47,9 +47,9 @@ extern unsigned long baikal_clk_freq; * Physical Memory Map *----------------------------------------------- */ -#define CFG_SYS_SDRAM_BASE 0x80000000 +#define CFG_SYS_SDRAM_BASE 0x80000000 /* Only one bank on lower 512 MB can be reached without MMU */ -#define CFG_SYS_SDRAM_SIZE 0x08000000 +#define CFG_SYS_SDRAM_SIZE 0x08000000 /* *----------------------------------------------- @@ -57,11 +57,11 @@ extern unsigned long baikal_clk_freq; *----------------------------------------------- */ /* Console I/O Buffer Size */ -#define CONFIG_SYS_CBSIZE 1024 +#define CONFIG_SYS_CBSIZE 1024 /* Мax number of command args */ -#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_MAXARGS 16 /* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* *----------------------------------------------- @@ -73,15 +73,15 @@ extern unsigned long baikal_clk_freq; #ifndef CONFIG_DM_SERIAL /* UART pool base address */ -#define BAIKAL_NS16550_BASE 0xBF04A000 +#define BAIKAL_NS16550_BASE 0xBF04A000 /* Register width 4 bytes, little endian */ -#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_REG_SIZE (-4) /* Use NS16550 UART as Serial device */ -#define CONFIG_SYS_NS16550_SERIAL 1 +#define CONFIG_SYS_NS16550_SERIAL 1 /* UART1 is enable and COM1 Port base */ -#define CONFIG_SYS_NS16550_COM1 (BAIKAL_NS16550_BASE + 0x0000) +#define CONFIG_SYS_NS16550_COM1 (BAIKAL_NS16550_BASE + 0x0000) /* UART2 is enable and COM2 Port base */ -#define CONFIG_SYS_NS16550_COM2 (BAIKAL_NS16550_BASE + 0x1000) +#define CONFIG_SYS_NS16550_COM2 (BAIKAL_NS16550_BASE + 0x1000) #endif /* @@ -89,7 +89,7 @@ extern unsigned long baikal_clk_freq; * SPI-flash/Boot controller parameters *----------------------------------------------- */ -#define CONFIG_SYS_FLASH_BASE 0x9C000000 +#define CONFIG_SYS_FLASH_BASE 0x9C000000 /* *----------------------------------------------- @@ -110,7 +110,7 @@ extern unsigned long baikal_clk_freq; * Misc parameters *----------------------------------------------- */ -#define MACH_SKIP_L2_BYPASS /* Don't set L2B flag - it cannot be cleared */ -#define BAIKAL_CPU_CLK_NAME "cpu_clk" +#define MACH_SKIP_L2_BYPASS /* Don't set L2B flag - it cannot be cleared */ +#define BAIKAL_CPU_CLK_NAME "cpu_clk" #endif /* __CONFIG_BAIKAL_MIPS_H */ -- 2.39.5