From 3805c2420e4839623bd8e7d4383a561206ed8e84 Mon Sep 17 00:00:00 2001 From: Chris Dearman Date: Fri, 20 Mar 2009 15:33:55 -0700 Subject: [PATCH] MIPS: R2: Fix problem with code that incorrectly modifies ebase. Commit f39ac4e46dd8a818ca5d1e093b2e740822fdf2c5 had a change that incorrectly modified ebase. This backs out the lines that modified ebase. In addition, the ebase exception vector is now allocated with correct alignment and the ebase register updated according to the architecture specification. Based on original patch by David VomLehn . Signed-off-by: David VomLehn Signed-off-by: Chris Dearman Signed-off-by: Ralf Baechle --- arch/mips/kernel/traps.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index b2d7041341b8f..29fadaccecdde 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1520,7 +1520,9 @@ void __cpuinit per_cpu_trap_init(void) #endif /* CONFIG_MIPS_MT_SMTC */ if (cpu_has_veic || cpu_has_vint) { + unsigned long sr = set_c0_status(ST0_BEV); write_c0_ebase(ebase); + write_c0_status(sr); /* Setting vector spacing enables EI/VI mode */ change_c0_intctl(0x3e0, VECTORSPACING); } @@ -1602,8 +1604,6 @@ void __cpuinit set_uncached_handler(unsigned long offset, void *addr, #ifdef CONFIG_64BIT unsigned long uncached_ebase = TO_UNCAC(ebase); #endif - if (cpu_has_mips_r2) - uncached_ebase += (read_c0_ebase() & 0x3ffff000); if (!addr) panic(panic_null_cerr); @@ -1635,9 +1635,11 @@ void __init trap_init(void) return; /* Already done */ #endif - if (cpu_has_veic || cpu_has_vint) - ebase = (unsigned long) alloc_bootmem_low_pages(0x200 + VECTORSPACING*64); - else { + if (cpu_has_veic || cpu_has_vint) { + unsigned long size = 0x200 + VECTORSPACING*64; + ebase = (unsigned long) + __alloc_bootmem(size, 1 << fls(size), 0); + } else { ebase = CAC_BASE; if (cpu_has_mips_r2) ebase += (read_c0_ebase() & 0x3ffff000); -- 2.39.5