From 16796a25fefc4ecf780211bf554d3b8dc5436fa4 Mon Sep 17 00:00:00 2001 From: Usama Arif Date: Tue, 18 Aug 2020 12:30:37 +0100 Subject: [PATCH] plat: tc0: enable TZC Change-Id: Ic2bb8482f0b602f6b7850d4fa553448bc4931edc Signed-off-by: Usama Arif --- plat/arm/board/tc0/include/platform_def.h | 17 ++++++++++++++++- plat/arm/board/tc0/platform.mk | 4 +++- plat/arm/board/tc0/tc0_security.c | 13 ++++++++++++- 3 files changed, 31 insertions(+), 3 deletions(-) diff --git a/plat/arm/board/tc0/include/platform_def.h b/plat/arm/board/tc0/include/platform_def.h index a8d471ee3..075c4037b 100644 --- a/plat/arm/board/tc0/include/platform_def.h +++ b/plat/arm/board/tc0/include/platform_def.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2020, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -191,4 +191,19 @@ */ #define PLAT_CSS_MAX_SCP_BL2U_SIZE 0x20000 +/* TZC Related Constants */ +#define PLAT_ARM_TZC_BASE UL(0x25000000) +#define PLAT_ARM_TZC_FILTERS TZC_400_REGION_ATTR_FILTER_BIT(0) + +#define TZC400_OFFSET UL(0x1000000) +#define TZC400_COUNT 4 + +#define TZC400_BASE(n) (PLAT_ARM_TZC_BASE + \ + (n * TZC400_OFFSET)) + +#define TZC_NSAID_DEFAULT U(0) + +#define PLAT_ARM_TZC_NS_DEV_ACCESS \ + (TZC_REGION_ACCESS_RDWR(TZC_NSAID_DEFAULT)) + #endif /* PLATFORM_DEF_H */ diff --git a/plat/arm/board/tc0/platform.mk b/plat/arm/board/tc0/platform.mk index 903fabfb0..05d691ee2 100644 --- a/plat/arm/board/tc0/platform.mk +++ b/plat/arm/board/tc0/platform.mk @@ -1,4 +1,4 @@ -# Copyright (c) 2020, ARM Limited and Contributors. All rights reserved. +# Copyright (c) 2020, Arm Limited. All rights reserved. # # SPDX-License-Identifier: BSD-3-Clause # @@ -61,6 +61,8 @@ BL2_SOURCES += ${TC0_BASE}/tc0_security.c \ ${TC0_BASE}/tc0_err.c \ ${TC0_BASE}/tc0_trusted_boot.c \ lib/utils/mem_region.c \ + drivers/arm/tzc/tzc400.c \ + plat/arm/common/arm_tzc400.c \ plat/arm/common/arm_nor_psci_mem_protect.c BL31_SOURCES += ${INTERCONNECT_SOURCES} \ diff --git a/plat/arm/board/tc0/tc0_security.c b/plat/arm/board/tc0/tc0_security.c index 6aa38c822..5f1cb1159 100644 --- a/plat/arm/board/tc0/tc0_security.c +++ b/plat/arm/board/tc0/tc0_security.c @@ -1,12 +1,23 @@ /* - * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2020, Arm Limited. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ +#include #include +static const arm_tzc_regions_info_t tzc_regions[] = { + ARM_TZC_REGIONS_DEF, + {} +}; + /* Initialize the secure environment */ void plat_arm_security_setup(void) { + unsigned int i; + + for (i = 0U; i < TZC400_COUNT; i++) { + arm_tzc400_setup(TZC400_BASE(i), tzc_regions); + } } -- 2.39.5