From 0ba71ac90149e91db5a3ebb8f82a0ab320b6067a Mon Sep 17 00:00:00 2001 From: Pascal Paillet Date: Tue, 15 Dec 2020 19:05:09 +0100 Subject: [PATCH] refactor(st-pmic): use regulator framework for DDR init Use regulator framework for DDR initialization. Change-Id: I9dffe499ca12cdc35904de7daf2dda821b267a31 Signed-off-by: Pascal Paillet Signed-off-by: Yann Gautier --- drivers/st/pmic/stm32mp_pmic.c | 105 +++++++++++++-------------------- 1 file changed, 40 insertions(+), 65 deletions(-) diff --git a/drivers/st/pmic/stm32mp_pmic.c b/drivers/st/pmic/stm32mp_pmic.c index c25a2427c..6a30dce4a 100644 --- a/drivers/st/pmic/stm32mp_pmic.c +++ b/drivers/st/pmic/stm32mp_pmic.c @@ -20,16 +20,6 @@ #include #define PMIC_NODE_NOT_FOUND 1 -#define STPMIC1_LDO12356_OUTPUT_MASK (uint8_t)(GENMASK(6, 2)) -#define STPMIC1_LDO12356_OUTPUT_SHIFT 2 -#define STPMIC1_LDO3_MODE (uint8_t)(BIT(7)) -#define STPMIC1_LDO3_DDR_SEL 31U -#define STPMIC1_LDO3_1800000 (9U << STPMIC1_LDO12356_OUTPUT_SHIFT) - -#define STPMIC1_BUCK_OUTPUT_SHIFT 2 -#define STPMIC1_BUCK3_1V8 (39U << STPMIC1_BUCK_OUTPUT_SHIFT) - -#define STPMIC1_DEFAULT_START_UP_DELAY_MS 1 static struct i2c_handle_s i2c_handle; static uint32_t pmic_i2c_addr; @@ -227,53 +217,51 @@ void print_pmic_info_and_debug(void) int pmic_ddr_power_init(enum ddr_type ddr_type) { - bool buck3_at_1v8 = false; - uint8_t read_val; int status; + uint16_t buck3_min_mv; + struct rdev *buck2, *buck3, *ldo3, *vref; - switch (ddr_type) { - case STM32MP_DDR3: - /* Set LDO3 to sync mode */ - status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val); - if (status != 0) { - return status; - } + buck2 = regulator_get_by_name("buck2"); + if (buck2 == NULL) { + return -ENOENT; + } - read_val &= ~STPMIC1_LDO3_MODE; - read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK; - read_val |= STPMIC1_LDO3_DDR_SEL << - STPMIC1_LDO12356_OUTPUT_SHIFT; + ldo3 = regulator_get_by_name("ldo3"); + if (ldo3 == NULL) { + return -ENOENT; + } + + vref = regulator_get_by_name("vref_ddr"); + if (vref == NULL) { + return -ENOENT; + } - status = stpmic1_register_write(LDO3_CONTROL_REG, read_val); + switch (ddr_type) { + case STM32MP_DDR3: + status = regulator_set_flag(ldo3, REGUL_SINK_SOURCE); if (status != 0) { return status; } - status = stpmic1_regulator_voltage_set("buck2", 1350); + status = regulator_set_min_voltage(buck2); if (status != 0) { return status; } - status = stpmic1_regulator_enable("buck2"); + status = regulator_enable(buck2); if (status != 0) { return status; } - mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); - - status = stpmic1_regulator_enable("vref_ddr"); + status = regulator_enable(vref); if (status != 0) { return status; } - mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); - - status = stpmic1_regulator_enable("ldo3"); + status = regulator_enable(ldo3); if (status != 0) { return status; } - - mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); break; case STM32MP_LPDDR2: @@ -283,57 +271,44 @@ int pmic_ddr_power_init(enum ddr_type ddr_type) * Set LDO3 to bypass mode if BUCK3 = 1.8V * Set LDO3 to normal mode if BUCK3 != 1.8V */ - status = stpmic1_register_read(BUCK3_CONTROL_REG, &read_val); - if (status != 0) { - return status; + buck3 = regulator_get_by_name("buck3"); + if (buck3 == NULL) { + return -ENOENT; } - if ((read_val & STPMIC1_BUCK3_1V8) == STPMIC1_BUCK3_1V8) { - buck3_at_1v8 = true; - } + regulator_get_range(buck3, &buck3_min_mv, NULL); - status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val); - if (status != 0) { - return status; - } - - read_val &= ~STPMIC1_LDO3_MODE; - read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK; - read_val |= STPMIC1_LDO3_1800000; - if (buck3_at_1v8) { - read_val |= STPMIC1_LDO3_MODE; - } - - status = stpmic1_register_write(LDO3_CONTROL_REG, read_val); - if (status != 0) { - return status; + if (buck3_min_mv != 1800) { + status = regulator_set_min_voltage(ldo3); + if (status != 0) { + return status; + } + } else { + status = regulator_set_flag(ldo3, REGUL_ENABLE_BYPASS); + if (status != 0) { + return status; + } } - status = stpmic1_regulator_voltage_set("buck2", 1200); + status = regulator_set_min_voltage(buck2); if (status != 0) { return status; } - status = stpmic1_regulator_enable("ldo3"); + status = regulator_enable(ldo3); if (status != 0) { return status; } - mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); - - status = stpmic1_regulator_enable("buck2"); + status = regulator_enable(buck2); if (status != 0) { return status; } - mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); - - status = stpmic1_regulator_enable("vref_ddr"); + status = regulator_enable(vref); if (status != 0) { return status; } - - mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); break; default: -- 2.39.5