[SERIAL] 8250: set divisor register correctly for AMD Alchemy SoC uart

[SERIAL] 8250: set divisor register correctly for AMD Alchemy SoC uart

Alchemy SoC uart have got a non-standard divisor register that needs some
special handling.

This patch adds divisor read/write functions with test and special
handling for Alchemy internal uart.

Signed-off-by: Jon Anders Haugum <jonah@omegav.ntnu.no>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>