]> git.baikalelectronics.ru Git - kernel.git/commit
x86/mce: Enable additional error logging on certain Intel CPUs
authorTony Luck <tony.luck@intel.com>
Fri, 30 Oct 2020 19:04:00 +0000 (12:04 -0700)
committerBorislav Petkov <bp@suse.de>
Mon, 2 Nov 2020 10:15:59 +0000 (11:15 +0100)
commita56d841754ae53f98fc00cb4b57d773569583491
treea799950b549bf767c61be95bcc8f83275b86bd7e
parentd2c48bc47e809f1f3aea6b58759df466c623eb91
x86/mce: Enable additional error logging on certain Intel CPUs

The Xeon versions of Sandy Bridge, Ivy Bridge and Haswell support an
optional additional error logging mode which is enabled by an MSR.

Previously, this mode was enabled from the mcelog(8) tool via /dev/cpu,
but userspace should not be poking at MSRs. So move the enabling into
the kernel.

 [ bp: Correct the explanation why this is done. ]

Suggested-by: Boris Petkov <bp@alien8.de>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20201030190807.GA13884@agluck-desk2.amr.corp.intel.com
arch/x86/include/asm/msr-index.h
arch/x86/kernel/cpu/mce/intel.c