]> git.baikalelectronics.ru Git - kernel.git/commit
mmc: sdhci-tegra: Fix SDHCI_RESET_ALL for CQHCI
authorBrian Norris <briannorris@chromium.org>
Wed, 26 Oct 2022 19:42:07 +0000 (12:42 -0700)
committerUlf Hansson <ulf.hansson@linaro.org>
Mon, 7 Nov 2022 12:33:38 +0000 (13:33 +0100)
commit8a569d9d340c006425da7d60d0151464c1cdc2d2
tree0b105ba9ae3eeb02e56a19133e1aa74f68d5008b
parentfa92de64798636950f009674b44e56b81b932ca5
mmc: sdhci-tegra: Fix SDHCI_RESET_ALL for CQHCI

[[ NOTE: this is completely untested by the author, but included solely
    because, as noted in commit b91680632ad8 ("mmc: sdhci-pci: Fix
    SDHCI_RESET_ALL for CQHCI for Intel GLK-based controllers"), "other
    drivers using CQHCI might benefit from a similar change, if they
    also have CQHCI reset by SDHCI_RESET_ALL." We've now seen the same
    bug on at least MSM, Arasan, and Intel hardware. ]]

SDHCI_RESET_ALL resets will reset the hardware CQE state, but we aren't
tracking that properly in software. When out of sync, we may trigger
various timeouts.

It's not typical to perform resets while CQE is enabled, but this may
occur in some suspend or error recovery scenarios.

Include this fix by way of the new sdhci_and_cqhci_reset() helper.

This patch depends on (and should not compile without) the patch
entitled "mmc: cqhci: Provide helper for resetting both SDHCI and
CQHCI".

Fixes: d00ccd367536 ("mmc: tegra: HW Command Queue Support for Tegra SDMMC")
Signed-off-by: Brian Norris <briannorris@chromium.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20221026124150.v4.5.I418c9eaaf754880fcd2698113e8c3ef821a944d7@changeid
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci-tegra.c