Andre Przywara [Sun, 17 Feb 2019 22:10:11 +0000 (22:10 +0000)]
allwinner: regulators: pick correct DT subnode
So far the DT node describing the AXP803 PMIC used in many Allwinner A64
boards had only one subnode, so our code just entering the first subnode
to find all regulators worked fine.
However recent DT updates in the Linux kernel add more subnodes *before*
that, so we need to make sure to explicitly enter the "regulators"
subnode to find the information we are after.
Improve some DT node parsing error handling on the way.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Heiko Stuebner [Tue, 5 Mar 2019 23:29:13 +0000 (00:29 +0100)]
Fixup register handling in aarch32 reset_handler
The BL handover interface stores the bootloader arguments in
registers r9-r12, so when the reset_handler stores the lr pointer
in r10 it clobers one of the arguments.
Adapt to use r8 and adapt the comment about registers allowed
to clober.
I've checked aarch32 reset_handlers and none seem to use higher
registers as far as I can tell.
Fixes: a6f340fe58b9 ("Introduce the new BL handover interface") Cc: Soby Mathew <soby.mathew@arm.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Luca Ceresoli [Thu, 28 Feb 2019 21:15:35 +0000 (22:15 +0100)]
zynqmp: pm: Add support for setting PMU configuration object
Allow EL2 (e.g. U-Boot) to load the configuration object at runtime
into the Xilinx ZynqMP PMU firmware. This allows booting with U-Boot
and U-Boot SPL with PMU FW without hard-coding the configuration
object.
Joel Hutton [Tue, 26 Feb 2019 16:23:54 +0000 (16:23 +0000)]
doc: Update links within imported wiki content
This patch covers two changes:
- Links that refer to GitHub are updated to point to the
relevant content on trustedfirmware.org
- Internal links between documents have been updated,
with the required .rst suffix being added or due
to a change in the relative locations of the files.
Change-Id: Ibf87da7d2ece726d1c94a9b33a2bbc3129de7779 Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com> Signed-off-by: Paul Beesley <paul.beesley@arm.com>
Joel Hutton [Mon, 25 Feb 2019 15:18:56 +0000 (15:18 +0000)]
doc: Migrate a subset of the GitHub wiki content
With the TF wiki being migrated from GitHub to trustedfirmware.org,
some documents will be moved into the docs/ directory within the
repository rather than remaining as external content. The
appropriate action has been decided on a per-document basis.
Change-Id: Id0f615f3418369256f30d2e34e354a115389d105 Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com> Signed-off-by: Paul Beesley <paul.beesley@arm.com>
Alexei Fedorov [Wed, 6 Mar 2019 11:15:51 +0000 (11:15 +0000)]
BL31: Enable pointer authentication support in warm boot path
In the current Pointer Authentication support added in
commit b86048c40cb7d9ccd7aeac1681945676a6dc36ff
PAuth gets enabled in BL31 cold boot entrypoint only,
(see bl31_entrypoint() in bl31\aarch64\bl31_entrypoint.S)
but not in bl31_warm_entrypoint().
This results in EnIA bit [31] in SCTLR_EL3 not being set
and pointer authentication disabled after CPU wake-up event.
Tien Hock, Loh [Thu, 7 Mar 2019 03:34:20 +0000 (11:34 +0800)]
drivers: mmc: Fix some issues with MMC stack
Some bugs in MMC stack needs to be fixed:
- scr cannot be local as this will cause cache issue when invalidating
after the read DMA transfer is completed
- ACMD41 needs to send voltage information in initialization, otherwise the
command is a query, thus will not initialize the controller
- when checking device state, retry until the retries counter goes to zero
before failing
Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>
Marek Vasut [Sat, 2 Mar 2019 14:34:36 +0000 (15:34 +0100)]
rcar_gen3: drivers: pfc: Configure GP5_09 as input on ULCB
Configure the GPIO5 09 pin as input on the ULCB board by default,
since the pin is routed on the expansion connector and not connected
to anything by default.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Varun Wadekar [Fri, 1 Mar 2019 18:18:35 +0000 (10:18 -0800)]
Tegra: dummy support for the io_storage backend
This patch provides dummy macros and platform files to compile
the io_storage driver backend. This patch is necessary to
remove the "--unresolved=el3_panic" linker flag from Tegra's
makefiles and allow us to revert this workaround, previously
suggested by the ARM toolchain team.
The "--unresolved=el3_panic" flag actually was a big hammer that
allowed Tegra platforms to work with armlink previously but it
masks legit errors with the code as well.
Doc: Fix internal links in interrupt framework design guide
Some of the sections numbers have been incorrect since the document
structure has changed. Using references to sections rather than
hard-coded section numbers fixes the issue while making it more
future-proof to updates.
While converting the interrupt framework design document from Markdown
to reStructuredText format, see commit 6f6257476754 ("Convert
documentation to reStructuredText"), the structure of the document was
changed and one of the titles got lost. Fix that.
Anson Huang [Fri, 1 Mar 2019 02:51:38 +0000 (10:51 +0800)]
imx: make sure GIC redistributor is awake before initialization
GICR_WAKER.ProcessorSleep can only be set to zero when:
— GICR_WAKER.Sleep bit[0] == 0.
— GICR_WAKER.Quiescent bit[31] == 0.
On some platforms, when system reboot with GIC in sleep
mode but with power ON, such as on NXP's i.MX8QM, Linux
kernel enters suspend but could be requested to reboot,
and GIC is in sleep mode and it is inside a power domain
which is ON in this scenario, when CPU reset, the GIC
driver trys to set CORE's redistributor interface to awake,
with GICR_WAKER.Sleep bit[0] and GICR_WAKER.Quiescent bit[31]
both set, the ProcessorSleep bit[1] will never be clear
and cause system hang.
This patch makes sure GICR_WAKER.Sleep bit[0] and
GICR_WAKER.Quiescent bit[31] are both zeor before clearing
ProcessorSleep bit[1].
David Pu [Fri, 22 Feb 2019 10:23:57 +0000 (02:23 -0800)]
xlat_tables_v2: find VA/idx with helper functions.
This patch introduces 2 helper functions 'xlat_tables_find_start_va' and
'xlat_tables_va_to_index' to find the first VA and table index affected by the
specified mmap region. it reduces code duplication and cyclomatic code
complexity in xlat_tables_map/unmap_region functions.
David Pu [Fri, 22 Feb 2019 10:15:57 +0000 (02:15 -0800)]
xlat_tables_v2: get unmap action type with helper function.
This patch introduces helper function 'xlat_tables_unmap_region_action'
to get the required action type from given arguments when unmapping the
specified region.
it reduces cyclomatic code complexity in xlat_tables_unmap_region function.
John Tsichritzis [Thu, 28 Feb 2019 11:14:03 +0000 (11:14 +0000)]
Remove Mbed TLS dependency from plat_bl_common.c
Due to the shared Mbed TLS heap optimisation introduced in 6d01a463,
common code files were depending on Mbed TLS specific headers. This
dependency is now removed by moving the default, unoptimised heap
implementation inside the Mbed TLS specific files.
Change-Id: I11ea3eb4474f0d9b6cb79a2afd73a51a4a9b8994 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
Louis Mayencourt [Wed, 27 Feb 2019 14:24:16 +0000 (14:24 +0000)]
Cortex-A73: Implement workaround for errata 852427
In AArch32, execution of 2 instructions with opposite condition code
might lead to either a data corruption or a CPU deadlock. Set the bit
12 of the Diagnostic Register to prevent this.
Change-Id: I22b4f25fe933e2942fd785e411e7c0aa39d5c1f4 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
Louis Mayencourt [Mon, 11 Feb 2019 11:25:50 +0000 (11:25 +0000)]
MPAM: enable MPAM EL2 traps
Complete the MPAM enablement in TF-A for lower ELs by enabling the EL2
traps in MPAMHCR_EL2 and MPAM2_EL2.This prevents an
MPAM-unaware-hypervisor to be restricted by an MPAM-aware-guest.
Change-Id: I47bf3f833fa22baa590f83d49cc0e3f2974e698d Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
Varun Wadekar [Fri, 11 Jan 2019 22:47:48 +0000 (14:47 -0800)]
Tegra: Support for scatterfile for the BL31 image
This patch provides support for using the scatterfile format as
the linker script with the 'armlink' linker for Tegra platforms.
In order to enable the scatterfile usage the following changes
have been made:
* provide mapping for ld.S symbols in bl_common.h
* include bl_common.h from all the affected files
* update the makefile rules to use the scatterfile and armlink
to compile BL31
* update pubsub.h to add sections to the scatterfile
NOTE: THIS CHANGE HAS BEEN VERIFIED WITH TEGRA PLATFORMS ONLY.
The previous commit added the infrastructure to load and save
ARMv8.3-PAuth registers during Non-secure <-> Secure world switches, but
didn't actually enable pointer authentication in the firmware.
This patch adds the functionality needed for platforms to provide
authentication keys for the firmware, and a new option (ENABLE_PAUTH) to
enable pointer authentication in the firmware itself. This option is
disabled by default, and it requires CTX_INCLUDE_PAUTH_REGS to be
enabled.
Change-Id: I35127ec271e1198d43209044de39fa712ef202a5 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
ARMv8.3-PAuth adds functionality that supports address authentication of
the contents of a register before that register is used as the target of
an indirect branch, or as a load.
This feature is supported only in AArch64 state.
This feature is mandatory in ARMv8.3 implementations.
This feature adds several registers to EL1. A new option called
CTX_INCLUDE_PAUTH_REGS has been added to select if the TF needs to save
them during Non-secure <-> Secure world switches. This option must be
enabled if the hardware has the registers or the values will be leaked
during world switches.
To prevent leaks, this patch also disables pointer authentication in the
Secure world if CTX_INCLUDE_PAUTH_REGS is 0. Any attempt to use it will
be trapped in EL3.
Change-Id: I27beba9907b9a86c6df1d0c5bf6180c972830855 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
This commit improves the SDHost driver for RPi3 as following:
* Unblock MMC_CMD(17). Using MMC_CMD(17) is more efficient on
block reading.
* In some low probability that SEND_OP_COND might results CRC7
error. We can consider that the command runs correctly. We don't
need to retry this command so removing the code for retry.
* Using MMC_BUS_WIDTH_1 as MMC default value to improve the stability.
* Increase the clock to 50Mhz in data mode to speed up the io.
* Change the pull resistors configuration to gain more stability.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
Streaming store under specific conditions might cause deadlock or data
corruption. Set bit 25:24 of CPUECTLR_EL1, which disables write
streaming to the L2 to prevent this.
Change-Id: Ib5cabb997b35ada78b27e75787afd610ea606dcf Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
TLBI VAAE1 or TLBI VAALE1 targeting a page within hardware page
aggregated address translation data in the L2 TLB might cause
corruption of address translation data. Set bit 59 of CPUACTLR2_EL1 to
prevent this.
Change-Id: I59f3edea54e87d264e0794f5ca2a8c68a636e586 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
Louis Mayencourt [Wed, 20 Feb 2019 12:11:41 +0000 (12:11 +0000)]
Add workaround for errata 764081 of Cortex-A75
Implicit Error Synchronization Barrier (IESB) might not be correctly
generated in Cortex-A75 r0p0. To prevent this, IESB are enabled at all
expection levels.
Change-Id: I2a1a568668a31e4f3f38d0fba1d632ad9939e5ad Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
Tien Hock, Loh [Tue, 26 Feb 2019 01:25:14 +0000 (09:25 +0800)]
plat: intel: Add BL31 support to Intel Stratix10 SoCFPGA platform
This adds BL31 support to Intel Stratix10 SoCFPGA platform. BL31 in TF-A
supports:
- PSCI calls to enable 4 CPU cores
- PSCI mailbox calls for FPGA reconfiguration
Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
Chris Spencer [Thu, 21 Feb 2019 08:35:26 +0000 (08:35 +0000)]
imx: Configure CAAM job rings master ID for i.MX8MQ
For i.MX8MQ B0 revision the default configuration of JRaMID is not valid
to allow the kernel to use the CAAM job rings. This patch sets the
master ID of the Cortex A in the JRaMID registers.
Signed-off-by: Chris Spencer <christopher.spencer@sea.co.uk>
projects / arm-tf.git / log