Paul Beesley [Mon, 11 Feb 2019 17:58:21 +0000 (17:58 +0000)]
doc: Fix heading levels for changelog
The change-log.rst file does not use the same symbols
as the other documents when organising its headings,
sub-headings and so on. In order to compile these
documents together with Sphinx, forming a top-level
index and a consistent structure, it is necessary to
normalise these.
Change-Id: Ib4620ff03a9e76fec9e36e95549016c7b3fe12bb Signed-off-by: Paul Beesley <paul.beesley@arm.com>
SPM: Adjust size of virtual address space per partition
Rather than using a fixed virtual address space size, read all regions
in the resource description of each partition and restrict the virtual
address space size to the one the partition actually needs.
This also allows SPM to take advantage of the extension ARMv8.4-TTST if
the virtual address space size is small enough.
Change-Id: I8646aa95e659136b58b44b040364cdee631f7e82 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Right now the virtual address space is fixed to
PLAT_VIRT_ADDR_SPACE_SIZE, so all base translation tables are the same
size and need the same alignment. The current code allocates the exact
space needed by this initial table.
However, a following patch is going to allow each partition to choose
the size of its address space based on the memory regions defined in
their resource description, so it isn't possible to determine this at
build time. As this optimization no longer applies, it has to be
removed.
Change-Id: Ia8d19f4981e1017e4ffe0ba136de73d701044cb0 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
This gives each Secure Partition complete freedom on its address space.
Previously, the memory used by the exception vectors was reserved and
couldn't be used. Also, it always had to be mapped, forcing SPM to
generate translation tables that included the exception vectors as well
as the Partition memory regions. With this change, partitions can reduce
their address space size easily.
Change-Id: I67fb5e9bdf2870b73347f23bff702fab0a8f8711 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Remi Pommarel [Sat, 30 Mar 2019 14:58:45 +0000 (15:58 +0100)]
meson/gxl: Add tool to create bl31 bootable images
GXL platforms need to have a specific header at the beginning of bl31
image to be able to boot. This adds a tool to create that and calls it at
build time.
Remi Pommarel [Thu, 28 Mar 2019 22:34:18 +0000 (23:34 +0100)]
meson/gxl: Add support for SHA256 DMA engine
In order to configure and boot SCP, BL31 has to compute and send
the SHA-256 of the firmware data via scpi. Luckily Amlogic GXL SOC
has a DMA facility that could be used to offload SHA-256
computations. This adds basic support of this hardware SHA-256
engine.
Add R-Car V3M support. This is based on the original
V3M support patch for Yocto v2.23.1 by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
---
Marek: Update on top of mainline ATF/master
Marek Vasut [Sat, 30 Mar 2019 03:01:41 +0000 (04:01 +0100)]
rcar_gen3: plat: Print DRAM bank size in MiB if below 1 GiB
Print the DRAM bank size in MiB instead of GiB in case the bank size
is smaller than 1 GiB. This prevents printing zeroes on systems with
small DRAM sizes.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Paul Beesley [Fri, 29 Mar 2019 10:14:56 +0000 (10:14 +0000)]
doc: Clarify draft status of SPCI and SPRT specs
These SPM-related specifications are mentioned in the readme and
the change log. Update references to these specs to make it clear
that they are in draft form and are expected to change.
Change-Id: Ia2791c48c371a828246d96f102a402747cd69f96 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
The latest version of GCC are required to use the new features of TF-A.
Suggest to use the latest version available on developer.arm.com instead
of the version specified on the Linaro Release notes.
At the time of writing, GCC 8.2-2019.01 is the latest version available.
Change-Id: Idd5c00749e39ca9dc8b7c5623b5d64356c9ce6e5 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
Paul Beesley [Mon, 25 Mar 2019 16:42:19 +0000 (16:42 +0000)]
doc: Add contents.rst to link to pages
This is the temporary contents page that links
to all other documents (except platform ports).
This page is needed during the
trustedfirmware.org migration, before we have a
Sphinx rendering pipeline set up, because cgit
doesn't offer a good way to view rendered docs
while browsing the tree. We need to have a links
page that can be opened from the cgit 'about'
view.
Change-Id: I3ad87a9fa8a14dc8e371aac7ee473575fed316bf Signed-off-by: Paul Beesley <paul.beesley@arm.com>
Tien Hock, Loh [Fri, 22 Mar 2019 04:54:31 +0000 (12:54 +0800)]
driver: synosys: Fix SD MMC not initializing correctly
dw_params.mmc_dev_type should be assigned before mmc_init, otherwise SDMMC
initialization will fail as the initialization treats the device as EMMC
instead of SD.
Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>
Fixed the below bugs:
1) Bug related to build flag V=1: if the flag was V=0, building with
ROMLIB would fail.
2) Due to a syntax bug in genwrappers.sh, index file entries marked as
"patch" or "reserved" were ignored.
3) Added a prepending hash to constants that genwrappers is generating.
4) Due to broken dependencies, currently the inclusion functionality is
intentionally not utilised. This is why the contents of romlib/jmptbl.i
have been copied to platform specific jmptbl.i files. As a result of the
broken dependencies, when changing the index files, e.g. patching
functions, a clean build is always required. This is a known issue that
will be fixed in the future.
Change-Id: I9d92aa9724e86d8f90fcd3e9f66a27aa3cab7aaa Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
xlat_tables_v2: Revert recent changes to remove recursion
This commit reverts the following commits:
- c54c7fc35842 ("xlat_tables_v2: print xlat tables without recursion")
- db8cac2d986a ("xlat_tables_v2: unmap region without recursion.")
- 0ffe269215bd ("xlat_tables_v2: map region without recursion.")
This was part of PR#1843.
A problem has been detected in one of our test run configurations
involving dynamic mapping of regions and it is blocking the next
release. Until the problem can be solved, it is safer to revert
the changes.
Change-Id: I3d5456e4dbebf291c8b74939c6fb02a912e0903b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Alexei Fedorov [Wed, 13 Mar 2019 11:05:07 +0000 (11:05 +0000)]
Declare PAuth for Secure world as experimental
Declare ENABLE_PAUTH and CTX_INCLUDE_PAUTH_REGS
build options as experimental.
Pointer Authentication is enabled for Non-secure world
irrespective of the value of these build flags if the
CPU supports it.
The patch also fixes the description of fiptool 'help' command.
Heiko Stuebner [Thu, 7 Mar 2019 07:07:11 +0000 (08:07 +0100)]
rockchip: add an fdt parsing stub for platform param
The Rockchip ATF platform can be entered from both Coreboot and U-Boot.
While Coreboot does submit the list of linked parameter structs as
platform param, upstream u-boot actually always provides a pointer
to a devicetree as parameter.
This results in current ATF not running at all when started from U-Boot.
To fix this, add a stub that checks if the parameter is a fdt so we
can at least boot and not get stuck. Later on we can extend this with
actual parsing of information from the devicetree.
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Louis Mayencourt [Wed, 13 Mar 2019 17:11:35 +0000 (17:11 +0000)]
fvp: Increase the size of the stack for FVP
When RECLAIM_INIT_CODE is 1, the stack is used to contain the .text.init
section. This is by default enable on FVP. Due to the size increase of
the .text.init section, the stack had to be adjusted contain it.
Change-Id: Ia392341970fb86c0426cf2229b1a7295453e2e32 Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
Put Pointer Authentication key value in BSS section
The dummy implementation of the plat_init_apiakey() platform API uses
an internal 128-bit buffer to store the initial key value used for
Pointer Authentication support.
The intent - as stated in the file comments - was for this buffer to
be write-protected by the MMU. Initialization of the buffer would be
performed before enabling the MMU, thus bypassing write protection
checks.
However, the key buffer ended up into its own read-write section by
mistake due to a typo on the section name ('rodata.apiakey' instead of
'.rodata.apiakey', note the leading dot). As a result, the linker
script was not pulling it into the .rodata output section.
One way to address this issue could have been to fix the section
name. However, this approach does not work well for BL1. Being the
first image in the boot flow, it typically is sitting in real ROM
so we don't have the capacity to update the key buffer at any time.
The dummy implementation of plat_init_apiakey() provided at the moment
is just there to demonstrate the Pointer Authentication feature in
action. Proper key management and key generation would have to be a
lot more careful on a production system.
Therefore, the approach chosen here to leave the key buffer in
writable memory but move it to the BSS section. This does mean that
the key buffer could be maliciously updated for intalling unintended
keys on the warm boot path but at the feature is only at an
experimental stage right now, this is deemed acceptable.
This patch applies the new MSR instruction to directly set the
PSTATE.SSBS bit which controls speculative loads. This new instruction
is available at Neoverse N1 core so it's utilised.
Change-Id: Iee18a8b042c90fdb72d2b98f364dcfbb17510728 Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
projects / arm-tf.git / log