From: Andrew F. Davis Date: Wed, 9 Dec 2020 23:52:50 +0000 (-0600) Subject: ti: k3: Introduce lite device board support X-Git-Tag: baikal/aarch64/sdk5.9~1051^2 X-Git-Url: https://git.baikalelectronics.ru/?a=commitdiff_plain;h=84af89563e1b17def844d3672bc601ae51f0257f;p=arm-tf.git ti: k3: Introduce lite device board support Add device support for the 'lite' K3 devices. These will use modified device addresses and allow for fewer cores to save memory. Note: This family of devices are characterized by a single cluster of ARMv8 processor upto a max of 4 processors and lack of a level 3 cache. The first generation of this family is introduced with AM642. See AM64X Technical Reference Manual (SPRUIM2, Nov 2020) for further details: https://www.ti.com/lit/pdf/spruim2 Signed-off-by: Andrew F. Davis Signed-off-by: Nishanth Menon Change-Id: I8cd2c1c9a9434646d0c72fca3162dd5bc9bd692a --- diff --git a/plat/ti/k3/board/lite/board.mk b/plat/ti/k3/board/lite/board.mk new file mode 100644 index 000000000..76246be47 --- /dev/null +++ b/plat/ti/k3/board/lite/board.mk @@ -0,0 +1,24 @@ +# +# Copyright (c) 2020, ARM Limited and Contributors. All rights reserved. +# +# SPDX-License-Identifier: BSD-3-Clause +# + +BL32_BASE ?= 0x9e800000 +$(eval $(call add_define,BL32_BASE)) + +PRELOADED_BL33_BASE ?= 0x80080000 +$(eval $(call add_define,PRELOADED_BL33_BASE)) + +K3_HW_CONFIG_BASE ?= 0x82000000 +$(eval $(call add_define,K3_HW_CONFIG_BASE)) + +# Define sec_proxy usage as the lite version +K3_SEC_PROXY_LITE := 1 +$(eval $(call add_define,K3_SEC_PROXY_LITE)) + +# We dont have system level coherency capability +USE_COHERENT_MEM := 0 + +PLAT_INCLUDES += \ + -Iplat/ti/k3/board/lite/include \ diff --git a/plat/ti/k3/board/lite/include/board_def.h b/plat/ti/k3/board/lite/include/board_def.h new file mode 100644 index 000000000..7c7ea62c1 --- /dev/null +++ b/plat/ti/k3/board/lite/include/board_def.h @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef BOARD_DEF_H +#define BOARD_DEF_H + +#include + +/* The ports must be in order and contiguous */ +#define K3_CLUSTER0_CORE_COUNT U(4) +#define K3_CLUSTER1_CORE_COUNT U(0) +#define K3_CLUSTER2_CORE_COUNT U(0) +#define K3_CLUSTER3_CORE_COUNT U(0) + +/* + * This RAM will be used for the bootloader including code, bss, and stacks. + * It may need to be increased if BL31 grows in size. + * Current computation assumes data structures necessary for GIC and ARM for + * a single cluster of 4 processor. + */ +#define SEC_SRAM_BASE 0x70000000 /* Base of SRAM */ +#define SEC_SRAM_SIZE 0x0001a000 /* 104k */ + +#define PLAT_MAX_OFF_STATE U(2) +#define PLAT_MAX_RET_STATE U(1) + +#define PLAT_PROC_START_ID 32 +#define PLAT_PROC_DEVICE_START_ID 135 +#define PLAT_CLUSTER_DEVICE_START_ID 134 + +#endif /* BOARD_DEF_H */