From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Sat, 13 Aug 2022 21:00:45 +0000 (-0700)
Subject: Merge tag 'ntb-5.20' of https://github.com/jonmason/ntb
X-Git-Tag: baikal/mips/sdk6.1~5026
X-Git-Url: https://git.baikalelectronics.ru/?a=commitdiff_plain;h=818cdacbbb962520127cdbe0b4f6d45c21a85e93;p=kernel.git

Merge tag 'ntb-5.20' of https://github.com/jonmason/ntb

Pull NTB updates from Jon Mason:
 "Non-Transparent Bridge updates.

  Fix of heap data and clang warnings, support for a new Intel NTB
  device, and NTB EndPoint Function (EPF) support and the various fixes
  for that"

* tag 'ntb-5.20' of https://github.com/jonmason/ntb:
  MAINTAINERS: add PCI Endpoint NTB drivers to NTB files
  NTB: EPF: Tidy up some bounds checks
  NTB: EPF: Fix error code in epf_ntb_bind()
  PCI: endpoint: pci-epf-vntb: reduce several globals to statics
  PCI: endpoint: pci-epf-vntb: fix error handle in epf_ntb_mw_bar_init()
  PCI: endpoint: Fix Kconfig dependency
  NTB: EPF: set pointer addr to null using NULL rather than 0
  Documentation: PCI: extend subheading underline for "lspci output" section
  Documentation: PCI: Use code-block block for scratchpad registers diagram
  Documentation: PCI: Add specification for the PCI vNTB function device
  PCI: endpoint: Support NTB transfer between RC and EP
  NTB: epf: Allow more flexibility in the memory BAR map method
  PCI: designware-ep: Allow pci_epc_set_bar() update inbound map address
  ntb: intel: add GNR support for Intel PCIe gen5 NTB
  NTB: ntb_tool: uninitialized heap data in tool_fn_write()
  ntb: idt: fix clang -Wformat warnings
---

818cdacbbb962520127cdbe0b4f6d45c21a85e93
diff --cc drivers/pci/controller/dwc/pcie-designware-ep.c
index cf16276797167,b4cb65d851cd8..83ddb190292e4
--- a/drivers/pci/controller/dwc/pcie-designware-ep.c
+++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
@@@ -215,9 -217,10 +219,10 @@@ static void dw_pcie_ep_clear_bar(struc
  
  	__dw_pcie_ep_reset_bar(pci, func_no, bar, epf_bar->flags);
  
 -	dw_pcie_disable_atu(pci, atu_index, DW_PCIE_REGION_INBOUND);
 +	dw_pcie_disable_atu(pci, PCIE_ATU_REGION_DIR_IB, atu_index);
  	clear_bit(atu_index, ep->ib_window_map);
  	ep->epf_bar[bar] = NULL;
+ 	ep->bar_to_atu[bar] = 0;
  }
  
  static int dw_pcie_ep_set_bar(struct pci_epc *epc, u8 func_no, u8 vfunc_no,