From: Andre Przywara <andre.przywara@arm.com>
Date: Mon, 22 Aug 2022 14:50:22 +0000 (+0100)
Subject: fix(fvp): fdts: fix memtimer subframe addressing
X-Git-Tag: baikal/aarch64/sdk5.9~91^2~2
X-Git-Url: https://git.baikalelectronics.ru/?a=commitdiff_plain;h=3fd12bb8c622917d8491082b1472c39efb89c0cf;p=arm-tf.git

fix(fvp): fdts: fix memtimer subframe addressing

The arm,armv7-timer-mem DT binding documentation demands that the
 #size-cells property should be <1> only.

Adjust the value to be <1> and drop the now needless leading 0 in the
frame's reg property. Convert to #address-cell = <1> on the way.
Also adjust the interrupts property to use the proper GIC macros.

Change-Id: Ia2224663b1e6aaa7cf94af777473641de6a840d2
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---

diff --git a/fdts/fvp-base-psci-common.dtsi b/fdts/fvp-base-psci-common.dtsi
index cf75c9550..d75c007df 100644
--- a/fdts/fvp-base-psci-common.dtsi
+++ b/fdts/fvp-base-psci-common.dtsi
@@ -173,13 +173,14 @@
 			compatible = "arm,armv7-timer-mem";
 			reg = <0x0 0x2a810000 0x0 0x10000>;
 			clock-frequency = <100000000>;
-			#address-cells = <2>;
-			#size-cells = <2>;
-			ranges;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0x0 0x0 0x2a810000 0x100000>;
+
 			frame@2a830000 {
 				frame-number = <1>;
-				interrupts = <0 26 4>;
-				reg = <0x0 0x2a830000 0x0 0x10000>;
+				interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+				reg = <0x20000 0x10000>;
 			};
 	};