#include "pm_defs.h"
/* Functions to be implemented by each PU */
-void pm_client_suspend(const struct pm_proc *proc, unsigned int state);
+void pm_client_suspend(const struct pm_proc *proc, uint32_t state);
void pm_client_abort_suspend(void);
void pm_client_wakeup(const struct pm_proc *proc);
*/
struct pm_proc {
const uint32_t node_id;
- const unsigned int pwrdn_mask;
+ const uint32_t pwrdn_mask;
const struct pm_ipi *ipi;
};
-const struct pm_proc *pm_get_proc(unsigned int cpuid);
+const struct pm_proc *pm_get_proc(uint32_t cpuid);
#endif /* PM_COMMON_H */
#define IPI_BLOCKING 1
#define IPI_NON_BLOCKING 0
-int pm_ipi_init(const struct pm_proc *proc);
+int32_t pm_ipi_init(const struct pm_proc *proc);
enum pm_ret_status pm_ipi_send(const struct pm_proc *proc,
uint32_t payload[PAYLOAD_ARG_CNT]);
uint32_t payload[PAYLOAD_ARG_CNT]);
enum pm_ret_status pm_ipi_send_sync(const struct pm_proc *proc,
uint32_t payload[PAYLOAD_ARG_CNT],
- unsigned int *value, size_t count);
-void pm_ipi_buff_read_callb(unsigned int *value, size_t count);
+ uint32_t *value, size_t count);
+void pm_ipi_buff_read_callb(uint32_t *value, size_t count);
void pm_ipi_irq_enable(const struct pm_proc *proc);
void pm_ipi_irq_clear(const struct pm_proc *proc);
uint32_t pm_ipi_irq_status(const struct pm_proc *proc);
uint64_t x3, uint64_t x4, void *cookie,
void *handle, uint64_t flags)
{
- int ret;
+ int32_t ret;
uint32_t ipi_local_id;
uint32_t ipi_remote_id;
- unsigned int is_secure;
+ uint32_t is_secure;
ipi_local_id = x1 & UNSIGNED32_MASK;
ipi_remote_id = x2 & UNSIGNED32_MASK;
SMC_RET1(handle, 0);
case IPI_MAILBOX_STATUS_ENQUIRY:
{
- int disable_irq;
+ int32_t disable_irq;
disable_irq = (x3 & IPI_SMC_ENQUIRY_DIRQ_MASK) ? 1 : 0;
ret = ipi_mb_enquire_status(ipi_local_id, ipi_remote_id);
}
case IPI_MAILBOX_ACK:
{
- int enable_irq;
+ int32_t enable_irq;
enable_irq = (x3 & IPI_SMC_ACK_EIRQ_MASK) ? 1 : 0;
ipi_mb_ack(ipi_local_id, ipi_remote_id);
*
* Return: FSBL_FLAGS_A53_0, FSBL_FLAGS_A53_1, FSBL_FLAGS_A53_2 or FSBL_FLAGS_A53_3
*/
-static int get_fsbl_cpu(const struct xfsbl_partition *partition)
+static int32_t get_fsbl_cpu(const struct xfsbl_partition *partition)
{
uint64_t flags = partition->flags & FSBL_FLAGS_CPU_MASK;
*
* Return: FSBL_FLAGS_EL0, FSBL_FLAGS_EL1, FSBL_FLAGS_EL2 or FSBL_FLAGS_EL3
*/
-static int get_fsbl_el(const struct xfsbl_partition *partition)
+static int32_t get_fsbl_el(const struct xfsbl_partition *partition)
{
uint64_t flags = partition->flags & FSBL_FLAGS_EL_MASK;
*
* Return: FSBL_FLAGS_NON_SECURE or FSBL_FLAGS_SECURE
*/
-static int get_fsbl_ss(const struct xfsbl_partition *partition)
+static int32_t get_fsbl_ss(const struct xfsbl_partition *partition)
{
uint64_t flags = partition->flags & FSBL_FLAGS_TZ_MASK;
*
* Return: SPSR_E_LITTLE or SPSR_E_BIG
*/
-static int get_fsbl_endian(const struct xfsbl_partition *partition)
+static int32_t get_fsbl_endian(const struct xfsbl_partition *partition)
{
uint64_t flags = partition->flags & FSBL_FLAGS_ENDIAN_MASK;
*
* Return: FSBL_FLAGS_ESTATE_A32 or FSBL_FLAGS_ESTATE_A64
*/
-static int get_fsbl_estate(const struct xfsbl_partition *partition)
+static int32_t get_fsbl_estate(const struct xfsbl_partition *partition)
{
uint64_t flags = partition->flags & FSBL_FLAGS_ESTATE_MASK;
*/
for (size_t i = 0; i < ATFHandoffParams->num_entries; i++) {
entry_point_info_t *image;
- int target_estate, target_secure;
- int target_cpu, target_endianness, target_el;
+ int32_t target_estate, target_secure;
+ int32_t target_cpu, target_endianness, target_el;
VERBOSE("BL31: %zd: entry:0x%" PRIx64 ", flags:0x%" PRIx64 "\n", i,
ATFHandoffParams->partition[i].entry_point,
*
* Called from pm_setup initialization function
*/
-int pm_ipi_init(const struct pm_proc *proc)
+int32_t pm_ipi_init(const struct pm_proc *proc)
{
bakery_lock_init(&pm_secure_lock);
ipi_mb_open(proc->ipi->local_ipi_id, proc->ipi->remote_ipi_id);
* @return Returns status, either success or error+reason
*/
static enum pm_ret_status pm_ipi_buff_read(const struct pm_proc *proc,
- unsigned int *value, size_t count)
+ uint32_t *value, size_t count)
{
size_t i;
#if IPI_CRC_CHECK
size_t j;
- unsigned int response_payload[PAYLOAD_ARG_CNT];
+ uint32_t response_payload[PAYLOAD_ARG_CNT];
#endif
uintptr_t buffer_base = proc->ipi->buffer_base +
IPI_BUFFER_TARGET_REMOTE_OFFSET +
*
* @return Returns status, either success or error+reason
*/
-void pm_ipi_buff_read_callb(unsigned int *value, size_t count)
+void pm_ipi_buff_read_callb(uint32_t *value, size_t count)
{
size_t i;
#if IPI_CRC_CHECK
*/
enum pm_ret_status pm_ipi_send_sync(const struct pm_proc *proc,
uint32_t payload[PAYLOAD_ARG_CNT],
- unsigned int *value, size_t count)
+ uint32_t *value, size_t count)
{
enum pm_ret_status ret;
uint32_t pm_ipi_irq_status(const struct pm_proc *proc)
{
- int ret;
+ int32_t ret;
ret = ipi_mb_enquire_status(proc->ipi->local_ipi_id,
proc->ipi->remote_ipi_id);
{0}
};
-static unsigned int zynqmp_get_silicon_ver(void)
+static uint32_t zynqmp_get_silicon_ver(void)
{
static unsigned int ver;
return ver;
}
-unsigned int zynqmp_get_uart_clk(void)
+uint32_t zynqmp_get_uart_clk(void)
{
unsigned int ver = zynqmp_get_silicon_ver();
#if LOG_LEVEL >= LOG_LEVEL_NOTICE
static const struct {
- unsigned int id;
- unsigned int ver;
+ uint32_t id;
+ uint32_t ver;
char *name;
bool evexists;
} zynqmp_devices[] = {
return zynqmp_get_silicon_idcode_name();
}
-static unsigned int zynqmp_get_ps_ver(void)
+static uint32_t zynqmp_get_ps_ver(void)
{
uint32_t ver = mmio_read_32(ZYNQMP_CSU_BASEADDR + ZYNQMP_CSU_VERSION_OFFSET);
static void zynqmp_print_platform_name(void)
{
- unsigned int ver = zynqmp_get_silicon_ver();
- unsigned int rtl = zynqmp_get_rtl_ver();
+ uint32_t ver = zynqmp_get_silicon_ver();
+ uint32_t rtl = zynqmp_get_rtl_ver();
char *label = "Unknown";
switch (ver) {
static inline void zynqmp_print_platform_name(void) { }
#endif
-unsigned int zynqmp_get_bootmode(void)
+uint32_t zynqmp_get_bootmode(void)
{
uint32_t r;
unsigned int ret;
generic_delay_timer_init();
}
-unsigned int plat_get_syscnt_freq2(void)
+uint32_t plat_get_syscnt_freq2(void)
{
- unsigned int ver = zynqmp_get_silicon_ver();
+ uint32_t ver = zynqmp_get_silicon_ver();
if (ver == ZYNQMP_CSU_VERSION_QEMU) {
return 65000000;
CONSOLE_FLAG_RUNTIME | CONSOLE_FLAG_BOOT);
} else if (ZYNQMP_CONSOLE_IS(dcc)) {
/* Initialize the dcc console for debug */
- int rc = console_dcc_register();
+ int32_t rc = console_dcc_register();
if (rc == 0) {
panic();
}
void zynqmp_config_setup(void);
-unsigned int zynqmp_calc_core_pos(u_register_t mpidr);
+uint32_t zynqmp_calc_core_pos(u_register_t mpidr);
/* ZynqMP specific functions */
-unsigned int zynqmp_get_uart_clk(void);
-unsigned int zynqmp_get_bootmode(void);
+uint32_t zynqmp_get_uart_clk(void);
+uint32_t zynqmp_get_bootmode(void);
#if ZYNQMP_WDT_RESTART
wfi();
}
-static int zynqmp_pwr_domain_on(u_register_t mpidr)
+static int32_t zynqmp_pwr_domain_on(u_register_t mpidr)
{
- unsigned int cpu_id = plat_core_pos_by_mpidr(mpidr);
+ uint32_t cpu_id = plat_core_pos_by_mpidr(mpidr);
const struct pm_proc *proc;
uint32_t buff[3];
enum pm_ret_status ret;
static void zynqmp_pwr_domain_off(const psci_power_state_t *target_state)
{
- unsigned int cpu_id = plat_my_core_pos();
+ uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) {
static void zynqmp_pwr_domain_suspend(const psci_power_state_t *target_state)
{
- unsigned int state;
- unsigned int cpu_id = plat_my_core_pos();
+ uint32_t state;
+ uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++)
static void zynqmp_pwr_domain_suspend_finish(const psci_power_state_t *target_state)
{
- unsigned int cpu_id = plat_my_core_pos();
+ uint32_t cpu_id = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpu_id);
for (size_t i = 0; i <= PLAT_MAX_PWR_LVL; i++) {
}
}
-static int zynqmp_validate_power_state(unsigned int power_state,
+static int32_t zynqmp_validate_power_state(uint32_t power_state,
psci_power_state_t *req_state)
{
VERBOSE("%s: power_state: 0x%x\n", __func__, power_state);
- int pstate = psci_get_pstate_type(power_state);
+ int32_t pstate = psci_get_pstate_type(power_state);
assert(req_state);
*
* SPDX-License-Identifier: BSD-3-Clause
*/
+#include <stdint.h>
-static const unsigned char plat_power_domain_tree_desc[] = {1, 4};
+static const uint8_t plat_power_domain_tree_desc[] = {1, 4};
-const unsigned char *plat_get_power_domain_tree_desc(void)
+const uint8_t *plat_get_power_domain_tree_desc(void)
{
return plat_power_domain_tree_desc;
}
#include <plat_private.h>
#include <plat/common/platform.h>
-int plat_core_pos_by_mpidr(u_register_t mpidr)
+int32_t plat_core_pos_by_mpidr(u_register_t mpidr)
{
if (mpidr & MPIDR_CLUSTER_MASK) {
return -1;
struct pm_clock {
char name[CLK_NAME_LEN];
uint8_t num_nodes;
- unsigned int control_reg;
- unsigned int status_reg;
+ uint32_t control_reg;
+ uint32_t status_reg;
int32_t (*parents)[];
struct pm_clock_node(*nodes)[];
};
*
* Return: Returns 1 if clock is valid else 0.
*/
-static bool pm_clock_valid(unsigned int clock_id)
+static bool pm_clock_valid(uint32_t clock_id)
{
unsigned int i;
*
* Return: Returns type of clock (OUTPUT/EXTERNAL).
*/
-static unsigned int pm_clock_type(unsigned int clock_id)
+static uint32_t pm_clock_type(uint32_t clock_id)
{
return (clock_id < CLK_MAX_OUTPUT_CLK) ?
CLK_TYPE_OUTPUT : CLK_TYPE_EXTERNAL;
*
* @return Returns success.
*/
-enum pm_ret_status pm_api_clock_get_num_clocks(unsigned int *nclocks)
+enum pm_ret_status pm_api_clock_get_num_clocks(uint32_t *nclocks)
{
*nclocks = CLK_MAX;
* This function is used by master to get nmae of clock specified
* by given clock ID.
*/
-void pm_api_clock_get_name(unsigned int clock_id, char *name)
+void pm_api_clock_get_name(uint32_t clock_id, char *name)
{
if (clock_id == CLK_MAX) {
memcpy(name, END_OF_CLK, sizeof(END_OF_CLK) > CLK_NAME_LEN ?
*
* @return Returns status, either success or error+reason
*/
-enum pm_ret_status pm_api_clock_get_topology(unsigned int clock_id,
- unsigned int index,
+enum pm_ret_status pm_api_clock_get_topology(uint32_t clock_id,
+ uint32_t index,
uint32_t *topology)
{
struct pm_clock_node *clock_nodes;
uint8_t num_nodes;
- unsigned int i;
+ uint32_t i;
uint16_t typeflags;
if (!pm_clock_valid(clock_id)) {
*
* @return Returns status, either success or error+reason
*/
-enum pm_ret_status pm_api_clock_get_fixedfactor_params(unsigned int clock_id,
+enum pm_ret_status pm_api_clock_get_fixedfactor_params(uint32_t clock_id,
uint32_t *mul,
uint32_t *div)
{
struct pm_clock_node *clock_nodes;
uint8_t num_nodes;
- unsigned int type, i;
+ uint32_t type, i;
if (!pm_clock_valid(clock_id)) {
return PM_RET_ERROR_ARGS;
*
* @return Returns status, either success or error+reason
*/
-enum pm_ret_status pm_api_clock_get_parents(unsigned int clock_id,
- unsigned int index,
+enum pm_ret_status pm_api_clock_get_parents(uint32_t clock_id,
+ uint32_t index,
uint32_t *parents)
{
- unsigned int i;
+ uint32_t i;
int32_t *clk_parents;
if (!pm_clock_valid(clock_id)) {
*
* @return Returns status, either success or error+reason
*/
-enum pm_ret_status pm_api_clock_get_attributes(unsigned int clock_id,
+enum pm_ret_status pm_api_clock_get_attributes(uint32_t clock_id,
uint32_t *attr)
{
if (clock_id >= CLK_MAX) {
* returned state value is valid or an error if returned by PMU
*/
enum pm_ret_status pm_clock_pll_get_state(struct pm_pll *pll,
- unsigned int *state)
+ uint32_t *state)
{
enum pm_ret_status status;
enum pm_pll_mode mode;
*/
enum pm_ret_status pm_clock_pll_set_parent(struct pm_pll *pll,
enum clock_id clock_id,
- unsigned int parent_index)
+ uint32_t parent_index)
{
if (!pll) {
return PM_RET_ERROR_ARGS;
*/
enum pm_ret_status pm_clock_pll_get_parent(struct pm_pll *pll,
enum clock_id clock_id,
- unsigned int *parent_index)
+ uint32_t *parent_index)
{
if (!pll) {
return PM_RET_ERROR_ARGS;
* @return Success if mode is buffered or error if an argument is invalid
*/
enum pm_ret_status pm_clock_set_pll_mode(enum clock_id clock_id,
- unsigned int mode)
+ uint32_t mode)
{
struct pm_pll *pll = pm_clock_get_pll(clock_id);
* @return Success if mode is stored or error if an argument is invalid
*/
enum pm_ret_status pm_clock_get_pll_mode(enum clock_id clock_id,
- unsigned int *mode)
+ uint32_t *mode)
{
struct pm_pll *pll = pm_clock_get_pll(clock_id);
*
* @return Returns success if clock_id is valid, otherwise an error
*/
-enum pm_ret_status pm_clock_id_is_valid(unsigned int clock_id)
+enum pm_ret_status pm_clock_id_is_valid(uint32_t clock_id)
{
if (!pm_clock_valid(clock_id)) {
return PM_RET_ERROR_ARGS;
*
* @return True(1)=clock has the divider, false(0)=otherwise
*/
-uint8_t pm_clock_has_div(unsigned int clock_id, enum pm_clock_div_id div_id)
+uint8_t pm_clock_has_div(uint32_t clock_id, enum pm_clock_div_id div_id)
{
uint32_t i;
struct pm_clock_node *nodes;
struct pm_pll;
struct pm_pll *pm_clock_get_pll(enum clock_id clock_id);
struct pm_pll *pm_clock_get_pll_by_related_clk(enum clock_id clock_id);
-uint8_t pm_clock_has_div(unsigned int clock_id, enum pm_clock_div_id div_id);
+uint8_t pm_clock_has_div(uint32_t clock_id, enum pm_clock_div_id div_id);
-void pm_api_clock_get_name(unsigned int clock_id, char *name);
-enum pm_ret_status pm_api_clock_get_num_clocks(unsigned int *nclocks);
-enum pm_ret_status pm_api_clock_get_topology(unsigned int clock_id,
- unsigned int index,
+void pm_api_clock_get_name(uint32_t clock_id, char *name);
+enum pm_ret_status pm_api_clock_get_num_clocks(uint32_t *nclocks);
+enum pm_ret_status pm_api_clock_get_topology(uint32_t clock_id,
+ uint32_t index,
uint32_t *topology);
-enum pm_ret_status pm_api_clock_get_fixedfactor_params(unsigned int clock_id,
+enum pm_ret_status pm_api_clock_get_fixedfactor_params(uint32_t clock_id,
uint32_t *mul,
uint32_t *div);
-enum pm_ret_status pm_api_clock_get_parents(unsigned int clock_id,
- unsigned int index,
+enum pm_ret_status pm_api_clock_get_parents(uint32_t clock_id,
+ uint32_t index,
uint32_t *parents);
-enum pm_ret_status pm_api_clock_get_attributes(unsigned int clock_id,
+enum pm_ret_status pm_api_clock_get_attributes(uint32_t clock_id,
uint32_t *attr);
enum pm_ret_status pm_api_clock_get_max_divisor(enum clock_id clock_id,
uint8_t div_type,
enum pm_ret_status pm_clock_get_pll_node_id(enum clock_id clock_id,
enum pm_node_id *node_id);
-enum pm_ret_status pm_clock_id_is_valid(unsigned int clock_id);
+enum pm_ret_status pm_clock_id_is_valid(uint32_t clock_id);
enum pm_ret_status pm_clock_pll_enable(struct pm_pll *pll);
enum pm_ret_status pm_clock_pll_disable(struct pm_pll *pll);
enum pm_ret_status pm_clock_pll_get_state(struct pm_pll *pll,
- unsigned int *state);
+ uint32_t *state);
enum pm_ret_status pm_clock_pll_set_parent(struct pm_pll *pll,
enum clock_id clock_id,
- unsigned int parent_index);
+ uint32_t parent_index);
enum pm_ret_status pm_clock_pll_get_parent(struct pm_pll *pll,
enum clock_id clock_id,
- unsigned int *parent_index);
+ uint32_t *parent_index);
enum pm_ret_status pm_clock_set_pll_mode(enum clock_id clock_id,
- unsigned int mode);
+ uint32_t mode);
enum pm_ret_status pm_clock_get_pll_mode(enum clock_id clock_id,
- unsigned int *mode);
+ uint32_t *mode);
#endif /* PM_API_CLOCK_H */
*
* @return Returns status, either success or error+reason
*/
-static enum pm_ret_status pm_ioctl_get_rpu_oper_mode(unsigned int *mode)
+static enum pm_ret_status pm_ioctl_get_rpu_oper_mode(uint32_t *mode)
{
- unsigned int val;
+ uint32_t val;
val = mmio_read_32(ZYNQMP_RPU_GLBL_CNTL);
val &= ZYNQMP_SLSPLIT_MASK;
*
* @return Returns status, either success or error+reason
*/
-static enum pm_ret_status pm_ioctl_set_rpu_oper_mode(unsigned int mode)
+static enum pm_ret_status pm_ioctl_set_rpu_oper_mode(uint32_t mode)
{
- unsigned int val;
+ uint32_t val;
if (mmio_read_32(CRL_APB_RST_LPD_TOP) & CRL_APB_RPU_AMBA_RESET) {
return PM_RET_ERROR_ACCESS;
* @return Returns status, either success or error+reason
*/
static enum pm_ret_status pm_ioctl_config_boot_addr(enum pm_node_id nid,
- unsigned int value)
+ uint32_t value)
{
- unsigned int rpu_cfg_addr, val;
+ uint32_t rpu_cfg_addr, val;
if (nid == NODE_RPU_0) {
rpu_cfg_addr = ZYNQMP_RPU0_CFG;
*
* @return Returns status, either success or error+reason
*/
-static enum pm_ret_status pm_ioctl_config_tcm_comb(unsigned int value)
+static enum pm_ret_status pm_ioctl_config_tcm_comb(uint32_t value)
{
- unsigned int val;
+ uint32_t val;
val = mmio_read_32(ZYNQMP_RPU_GLBL_CNTL);
*
* @return Returns status, either success or error+reason
*/
-static enum pm_ret_status pm_ioctl_set_tapdelay_bypass(unsigned int type,
- unsigned int value)
+static enum pm_ret_status pm_ioctl_set_tapdelay_bypass(uint32_t type,
+ uint32_t value)
{
if ((value != PM_TAPDELAY_BYPASS_ENABLE &&
value != PM_TAPDELAY_BYPASS_DISABLE) || type >= PM_TAPDELAY_MAX) {
* @return Returns status, either success or error+reason
*/
static enum pm_ret_status pm_ioctl_set_sgmii_mode(enum pm_node_id nid,
- unsigned int value)
+ uint32_t value)
{
- unsigned int val, mask, shift;
+ uint32_t val, mask, shift;
enum pm_ret_status ret;
if (value != PM_SGMII_DISABLE && value != PM_SGMII_ENABLE) {
* @return Returns status, either success or error+reason
*/
static enum pm_ret_status pm_ioctl_sd_dll_reset(enum pm_node_id nid,
- unsigned int type)
+ uint32_t type)
{
- unsigned int mask, val;
+ uint32_t mask, val;
enum pm_ret_status ret;
if (nid == NODE_SD_0) {
*/
static enum pm_ret_status pm_ioctl_sd_set_tapdelay(enum pm_node_id nid,
enum tap_delay_type type,
- unsigned int value)
+ uint32_t value)
{
- unsigned int shift;
+ uint32_t shift;
enum pm_ret_status ret;
- unsigned int val, mask;
+ uint32_t val, mask;
if (nid == NODE_SD_0) {
shift = 0;
* @return Returns status, either success or error+reason
*/
static enum pm_ret_status pm_ioctl_set_pll_frac_mode
- (unsigned int pll, unsigned int mode)
+ (uint32_t pll, uint32_t mode)
{
return pm_clock_set_pll_mode(pll, mode);
}
* @return Returns status, either success or error+reason
*/
static enum pm_ret_status pm_ioctl_get_pll_frac_mode
- (unsigned int pll, unsigned int *mode)
+ (uint32_t pll, uint32_t *mode)
{
return pm_clock_get_pll_mode(pll, mode);
}
* @return Returns status, either success or error+reason
*/
static enum pm_ret_status pm_ioctl_set_pll_frac_data
- (unsigned int pll, unsigned int data)
+ (uint32_t pll, uint32_t data)
{
enum pm_node_id pll_nid;
enum pm_ret_status status;
* @return Returns status, either success or error+reason
*/
static enum pm_ret_status pm_ioctl_get_pll_frac_data
- (unsigned int pll, unsigned int *data)
+ (uint32_t pll, uint32_t *data)
{
enum pm_node_id pll_nid;
enum pm_ret_status status;
*
* @return Returns status, either success or error+reason
*/
-static enum pm_ret_status pm_ioctl_write_ggs(unsigned int index,
- unsigned int value)
+static enum pm_ret_status pm_ioctl_write_ggs(uint32_t index,
+ uint32_t value)
{
if (index >= GGS_NUM_REGS) {
return PM_RET_ERROR_ARGS;
*
* @return Returns status, either success or error+reason
*/
-static enum pm_ret_status pm_ioctl_read_ggs(unsigned int index,
- unsigned int *value)
+static enum pm_ret_status pm_ioctl_read_ggs(uint32_t index,
+ uint32_t *value)
{
if (index >= GGS_NUM_REGS) {
return PM_RET_ERROR_ARGS;
*
* @return Returns status, either success or error+reason
*/
-static enum pm_ret_status pm_ioctl_write_pggs(unsigned int index,
- unsigned int value)
+static enum pm_ret_status pm_ioctl_write_pggs(uint32_t index,
+ uint32_t value)
{
if (index >= PGGS_NUM_REGS) {
return PM_RET_ERROR_ARGS;
*
* @return Returns status, either success or error+reason
*/
-static enum pm_ret_status pm_ioctl_afi(unsigned int index,
- unsigned int value)
+static enum pm_ret_status pm_ioctl_afi(uint32_t index,
+ uint32_t value)
{
- unsigned int mask;
- unsigned int regarr[] = {0xFD360000U,
+ uint32_t mask;
+ uint32_t regarr[] = {0xFD360000U,
0xFD360014U,
0xFD370000U,
0xFD370014U,
*
* @return Returns status, either success or error+reason
*/
-static enum pm_ret_status pm_ioctl_read_pggs(unsigned int index,
- unsigned int *value)
+static enum pm_ret_status pm_ioctl_read_pggs(uint32_t index,
+ uint32_t *value)
{
if (index >= PGGS_NUM_REGS) {
return PM_RET_ERROR_ARGS;
*
* @return Returns status, either success or error+reason
*/
-static enum pm_ret_status pm_ioctl_set_boot_health_status(unsigned int value)
+static enum pm_ret_status pm_ioctl_set_boot_health_status(uint32_t value)
{
return pm_mmio_write(PMU_GLOBAL_GEN_STORAGE4,
PM_BOOT_HEALTH_STATUS_MASK, value);
* @return Returns status, either success or error+reason
*/
enum pm_ret_status pm_api_ioctl(enum pm_node_id nid,
- unsigned int ioctl_id,
- unsigned int arg1,
- unsigned int arg2,
- unsigned int *value)
+ uint32_t ioctl_id,
+ uint32_t arg1,
+ uint32_t arg2,
+ uint32_t *value)
{
enum pm_ret_status ret;
uint32_t payload[PAYLOAD_ARG_CNT];
IOCTL_AFI,
};
uint8_t i, ioctl_id;
- int ret;
+ int32_t ret;
for (i = 0U; i < ARRAY_SIZE(supported_ids); i++) {
ioctl_id = supported_ids[i];
#define PM_DLL_RESET_PULSE 2U
enum pm_ret_status pm_api_ioctl(enum pm_node_id nid,
- unsigned int ioctl_id,
- unsigned int arg1,
- unsigned int arg2,
- unsigned int *value);
+ uint32_t ioctl_id,
+ uint32_t arg1,
+ uint32_t arg2,
+ uint32_t *value);
enum pm_ret_status atf_ioctl_bitmask(uint32_t *bit_mask);
#endif /* PM_API_IOCTL_H */
*
* @return Returns success.
*/
-enum pm_ret_status pm_api_pinctrl_get_num_pins(unsigned int *npins)
+enum pm_ret_status pm_api_pinctrl_get_num_pins(uint32_t *npins)
{
*npins = MAX_PIN;
*
* @return Returns success.
*/
-enum pm_ret_status pm_api_pinctrl_get_num_functions(unsigned int *nfuncs)
+enum pm_ret_status pm_api_pinctrl_get_num_functions(uint32_t *nfuncs)
{
*nfuncs = MAX_FUNCTION;
*
* @return Returns success.
*/
-enum pm_ret_status pm_api_pinctrl_get_num_func_groups(unsigned int fid,
- unsigned int *ngroups)
+enum pm_ret_status pm_api_pinctrl_get_num_func_groups(uint32_t fid,
+ uint32_t *ngroups)
{
if (fid >= MAX_FUNCTION) {
return PM_RET_ERROR_ARGS;
* This function is used by master to get name of function specified
* by given function ID.
*/
-void pm_api_pinctrl_get_function_name(unsigned int fid, char *name)
+void pm_api_pinctrl_get_function_name(uint32_t fid, char *name)
{
if (fid >= MAX_FUNCTION) {
memcpy(name, END_OF_FUNCTION, FUNCTION_NAME_LEN);
*
* Return: Returns status, either success or error+reason.
*/
-enum pm_ret_status pm_api_pinctrl_get_function_groups(unsigned int fid,
- unsigned int index,
+enum pm_ret_status pm_api_pinctrl_get_function_groups(uint32_t fid,
+ uint32_t index,
uint16_t *groups)
{
uint16_t grps;
*
* Return: Returns status, either success or error+reason.
*/
-enum pm_ret_status pm_api_pinctrl_get_pin_groups(unsigned int pin,
- unsigned int index,
+enum pm_ret_status pm_api_pinctrl_get_pin_groups(uint32_t pin,
+ uint32_t index,
uint16_t *groups)
{
- unsigned int i;
+ uint32_t i;
uint16_t *grps;
if (pin >= MAX_PIN) {
#define PINCTRL_DRIVE_STRENGTH_8MA 2U
#define PINCTRL_DRIVE_STRENGTH_12MA 3U
-void pm_api_pinctrl_get_function_name(unsigned int fid, char *name);
-enum pm_ret_status pm_api_pinctrl_get_function_groups(unsigned int fid,
- unsigned int index,
+void pm_api_pinctrl_get_function_name(uint32_t fid, char *name);
+enum pm_ret_status pm_api_pinctrl_get_function_groups(uint32_t fid,
+ uint32_t index,
uint16_t *groups);
-enum pm_ret_status pm_api_pinctrl_get_pin_groups(unsigned int pin,
- unsigned int index,
+enum pm_ret_status pm_api_pinctrl_get_pin_groups(uint32_t pin,
+ uint32_t index,
uint16_t *groups);
-enum pm_ret_status pm_api_pinctrl_get_num_pins(unsigned int *npins);
-enum pm_ret_status pm_api_pinctrl_get_num_functions(unsigned int *nfuncs);
-enum pm_ret_status pm_api_pinctrl_get_num_func_groups(unsigned int fid,
- unsigned int *ngroups);
+enum pm_ret_status pm_api_pinctrl_get_num_pins(uint32_t *npins);
+enum pm_ret_status pm_api_pinctrl_get_num_functions(uint32_t *nfuncs);
+enum pm_ret_status pm_api_pinctrl_get_num_func_groups(uint32_t fid,
+ uint32_t *ngroups);
#endif /* PM_API_PINCTRL_H */
};
/* default shutdown/reboot scope is system(2) */
-static unsigned int pm_shutdown_scope = PMF_SHUTDOWN_SUBTYPE_SYSTEM;
+static uint32_t pm_shutdown_scope = PMF_SHUTDOWN_SUBTYPE_SYSTEM;
/**
* pm_get_shutdown_scope() - Get the currently set shutdown scope
*
* @return Shutdown scope value
*/
-unsigned int pm_get_shutdown_scope(void)
+uint32_t pm_get_shutdown_scope(void)
{
return pm_shutdown_scope;
}
* @return Returns status, either success or error+reason
*/
enum pm_ret_status pm_self_suspend(enum pm_node_id nid,
- unsigned int latency,
- unsigned int state,
+ uint32_t latency,
+ uint32_t state,
uintptr_t address)
{
uint32_t payload[PAYLOAD_ARG_CNT];
- unsigned int cpuid = plat_my_core_pos();
+ uint32_t cpuid = plat_my_core_pos();
const struct pm_proc *proc = pm_get_proc(cpuid);
/*
*/
enum pm_ret_status pm_req_suspend(enum pm_node_id target,
enum pm_request_ack ack,
- unsigned int latency, unsigned int state)
+ uint32_t latency, uint32_t state)
{
uint32_t payload[PAYLOAD_ARG_CNT];
* @return Returns status, either success or error+reason
*/
enum pm_ret_status pm_req_wakeup(enum pm_node_id target,
- unsigned int set_address,
+ uint32_t set_address,
uintptr_t address,
enum pm_request_ack ack)
{
*/
enum pm_ret_status pm_set_wakeup_source(enum pm_node_id target,
enum pm_node_id wkup_node,
- unsigned int enable)
+ uint32_t enable)
{
uint32_t payload[PAYLOAD_ARG_CNT];
*
* @return Returns status, either success or error+reason
*/
-enum pm_ret_status pm_system_shutdown(unsigned int type, unsigned int subtype)
+enum pm_ret_status pm_system_shutdown(uint32_t type, uint32_t subtype)
{
uint32_t payload[PAYLOAD_ARG_CNT];
* @return Returns status, either success or error+reason
*/
enum pm_ret_status pm_req_node(enum pm_node_id nid,
- unsigned int capabilities,
- unsigned int qos,
+ uint32_t capabilities,
+ uint32_t qos,
enum pm_request_ack ack)
{
uint32_t payload[PAYLOAD_ARG_CNT];
* @return Returns status, either success or error+reason
*/
enum pm_ret_status pm_set_requirement(enum pm_node_id nid,
- unsigned int capabilities,
- unsigned int qos,
+ uint32_t capabilities,
+ uint32_t qos,
enum pm_request_ack ack)
{
uint32_t payload[PAYLOAD_ARG_CNT];
*
* @return Returns status, either success or error+reason
*/
-enum pm_ret_status pm_get_api_version(unsigned int *version)
+enum pm_ret_status pm_get_api_version(uint32_t *version)
{
uint32_t payload[PAYLOAD_ARG_CNT];
* @return Returns status, either success or error+reason
*/
enum pm_ret_status pm_mmio_write(uintptr_t address,
- unsigned int mask,
- unsigned int value)
+ uint32_t mask,
+ uint32_t value)
{
uint32_t payload[PAYLOAD_ARG_CNT];
*
* @return Returns status, either success or error+reason
*/
-enum pm_ret_status pm_mmio_read(uintptr_t address, unsigned int *value)
+enum pm_ret_status pm_mmio_read(uintptr_t address, uint32_t *value)
{
uint32_t payload[PAYLOAD_ARG_CNT];
* the fpga status
* @return Returns status, either success or error+reason
*/
-enum pm_ret_status pm_fpga_get_status(unsigned int *value)
+enum pm_ret_status pm_fpga_get_status(uint32_t *value)
{
uint32_t payload[PAYLOAD_ARG_CNT];
* @return Returns status, either success or error+reason
*/
enum pm_ret_status pm_ioctl(enum pm_node_id nid,
- unsigned int ioctl_id,
- unsigned int arg1,
- unsigned int arg2,
- unsigned int *value)
+ uint32_t ioctl_id,
+ uint32_t arg1,
+ uint32_t arg2,
+ uint32_t *value)
{
return pm_api_ioctl(nid, ioctl_id, arg1, arg2, value);
}
*
* Return: Returns status, either success or error+reason.
*/
-static enum pm_ret_status pm_clock_get_max_divisor(unsigned int clock_id,
+static enum pm_ret_status pm_clock_get_max_divisor(uint32_t clock_id,
uint8_t div_type,
uint32_t *max_div)
{
* This function is used by master to get nmae of clock specified
* by given clock ID.
*/
-static void pm_clock_get_name(unsigned int clock_id, char *name)
+static void pm_clock_get_name(uint32_t clock_id, char *name)
{
pm_api_clock_get_name(clock_id, name);
}
*
* @return Returns status, either success or error+reason
*/
-static enum pm_ret_status pm_clock_get_topology(unsigned int clock_id,
- unsigned int index,
+static enum pm_ret_status pm_clock_get_topology(uint32_t clock_id,
+ uint32_t index,
uint32_t *topology)
{
return pm_api_clock_get_topology(clock_id, index, topology);
*
* @return Returns status, either success or error+reason
*/
-static enum pm_ret_status pm_clock_get_fixedfactor_params(unsigned int clock_id,
+static enum pm_ret_status pm_clock_get_fixedfactor_params(uint32_t clock_id,
uint32_t *mul,
uint32_t *div)
{
*
* @return Returns status, either success or error+reason
*/
-static enum pm_ret_status pm_clock_get_parents(unsigned int clock_id,
- unsigned int index,
+static enum pm_ret_status pm_clock_get_parents(uint32_t clock_id,
+ uint32_t index,
uint32_t *parents)
{
return pm_api_clock_get_parents(clock_id, index, parents);
*
* @return Returns status, either success or error+reason
*/
-static enum pm_ret_status pm_clock_get_attributes(unsigned int clock_id,
+static enum pm_ret_status pm_clock_get_attributes(uint32_t clock_id,
uint32_t *attr)
{
return pm_api_clock_get_attributes(clock_id, attr);
* @return Error if an argument is not valid or status as returned by the
* PM controller (PMU)
*/
-static enum pm_ret_status pm_clock_gate(unsigned int clock_id,
- unsigned char enable)
+static enum pm_ret_status pm_clock_gate(uint32_t clock_id,
+ uint8_t enable)
{
uint32_t payload[PAYLOAD_ARG_CNT];
enum pm_ret_status status;
* @return: Error if an argument is not valid or status as returned by the
* pm_clock_gate
*/
-enum pm_ret_status pm_clock_enable(unsigned int clock_id)
+enum pm_ret_status pm_clock_enable(uint32_t clock_id)
{
struct pm_pll *pll;
* @return: Error if an argument is not valid or status as returned by the
* pm_clock_gate
*/
-enum pm_ret_status pm_clock_disable(unsigned int clock_id)
+enum pm_ret_status pm_clock_disable(uint32_t clock_id)
{
struct pm_pll *pll;
*
* Return: Returns status, either success or error+reason.
*/
-enum pm_ret_status pm_clock_getstate(unsigned int clock_id,
- unsigned int *state)
+enum pm_ret_status pm_clock_getstate(uint32_t clock_id,
+ uint32_t *state)
{
struct pm_pll *pll;
uint32_t payload[PAYLOAD_ARG_CNT];
*
* Return: Returns status, either success or error+reason.
*/
-enum pm_ret_status pm_clock_setdivider(unsigned int clock_id,
- unsigned int divider)
+enum pm_ret_status pm_clock_setdivider(uint32_t clock_id,
+ uint32_t divider)
{
enum pm_ret_status status;
enum pm_node_id nid;
*
* Return: Returns status, either success or error+reason.
*/
-enum pm_ret_status pm_clock_getdivider(unsigned int clock_id,
- unsigned int *divider)
+enum pm_ret_status pm_clock_getdivider(uint32_t clock_id,
+ uint32_t *divider)
{
enum pm_ret_status status;
enum pm_node_id nid;
*
* Return: Returns status, either success or error+reason.
*/
-enum pm_ret_status pm_clock_setrate(unsigned int clock_id,
+enum pm_ret_status pm_clock_setrate(uint32_t clock_id,
uint64_t rate)
{
return PM_RET_ERROR_NOTSUPPORTED;
*
* Return: Returns status, either success or error+reason.
*/
-enum pm_ret_status pm_clock_getrate(unsigned int clock_id,
+enum pm_ret_status pm_clock_getrate(uint32_t clock_id,
uint64_t *rate)
{
return PM_RET_ERROR_NOTSUPPORTED;
*
* Return: Returns status, either success or error+reason.
*/
-enum pm_ret_status pm_clock_setparent(unsigned int clock_id,
- unsigned int parent_index)
+enum pm_ret_status pm_clock_setparent(uint32_t clock_id,
+ uint32_t parent_index)
{
struct pm_pll *pll;
uint32_t payload[PAYLOAD_ARG_CNT];
*
* Return: Returns status, either success or error+reason.
*/
-enum pm_ret_status pm_clock_getparent(unsigned int clock_id,
- unsigned int *parent_index)
+enum pm_ret_status pm_clock_getparent(uint32_t clock_id,
+ uint32_t *parent_index)
{
struct pm_pll *pll;
uint32_t payload[PAYLOAD_ARG_CNT];
*
* Return: Returns status, either success or error+reason.
*/
-static enum pm_ret_status pm_pinctrl_get_num_function_groups(unsigned int fid,
+static enum pm_ret_status pm_pinctrl_get_num_function_groups(uint32_t fid,
uint32_t *ngroups)
{
return pm_api_pinctrl_get_num_func_groups(fid, ngroups);
* This function is used by master to get name of function specified
* by given function Id
*/
-static void pm_pinctrl_get_function_name(unsigned int fid, char *name)
+static void pm_pinctrl_get_function_name(uint32_t fid, char *name)
{
pm_api_pinctrl_get_function_name(fid, name);
}
*
* Return: Returns status, either success or error+reason.
*/
-static enum pm_ret_status pm_pinctrl_get_function_groups(unsigned int fid,
- unsigned int index,
+static enum pm_ret_status pm_pinctrl_get_function_groups(uint32_t fid,
+ uint32_t index,
uint16_t *groups)
{
return pm_api_pinctrl_get_function_groups(fid, index, groups);
*
* Return: Returns status, either success or error+reason.
*/
-static enum pm_ret_status pm_pinctrl_get_pin_groups(unsigned int pin_id,
- unsigned int index,
+static enum pm_ret_status pm_pinctrl_get_pin_groups(uint32_t pin_id,
+ uint32_t index,
uint16_t *groups)
{
return pm_api_pinctrl_get_pin_groups(pin_id, index, groups);
*
* This function returns requested data.
*/
-void pm_query_data(enum pm_query_id qid, unsigned int arg1, unsigned int arg2,
- unsigned int arg3, unsigned int *data)
+void pm_query_data(enum pm_query_id qid, uint32_t arg1, uint32_t arg2,
+ uint32_t arg3, uint32_t *data)
{
switch (qid) {
case PM_QID_CLOCK_GET_NAME:
*/
enum pm_ret_status pm_pll_set_parameter(enum pm_node_id nid,
enum pm_pll_param param_id,
- unsigned int value)
+ uint32_t value)
{
uint32_t payload[PAYLOAD_ARG_CNT];
*/
enum pm_ret_status pm_pll_get_parameter(enum pm_node_id nid,
enum pm_pll_param param_id,
- unsigned int *value)
+ uint32_t *value)
{
uint32_t payload[PAYLOAD_ARG_CNT];
*
* @return Returns status, either success or error+reason
*/
-enum pm_ret_status pm_register_access(unsigned int register_access_id,
- unsigned int address,
- unsigned int mask,
- unsigned int value,
- unsigned int *out)
+enum pm_ret_status pm_register_access(uint32_t register_access_id,
+ uint32_t address,
+ uint32_t mask,
+ uint32_t value,
+ uint32_t *out)
{
enum pm_ret_status ret;
return pm_ipi_send_sync(primary_proc, payload, value, 1);
}
-enum pm_ret_status em_set_action(unsigned int *value)
+enum pm_ret_status em_set_action(uint32_t *value)
{
uint32_t payload[PAYLOAD_ARG_CNT];
return pm_ipi_send_sync(primary_proc, payload, value, 1);
}
-enum pm_ret_status em_remove_action(unsigned int *value)
+enum pm_ret_status em_remove_action(uint32_t *value)
{
uint32_t payload[PAYLOAD_ARG_CNT];
return pm_ipi_send_sync(primary_proc, payload, value, 1);
}
-enum pm_ret_status em_send_errors(unsigned int *value)
+enum pm_ret_status em_send_errors(uint32_t *value)
{
uint32_t payload[PAYLOAD_ARG_CNT];
**********************************************************/
enum pm_ret_status pm_req_suspend(enum pm_node_id target,
enum pm_request_ack ack,
- unsigned int latency,
- unsigned int state);
+ uint32_t latency,
+ uint32_t state);
enum pm_ret_status pm_self_suspend(enum pm_node_id nid,
- unsigned int latency,
- unsigned int state,
+ uint32_t latency,
+ uint32_t state,
uintptr_t address);
enum pm_ret_status pm_force_powerdown(enum pm_node_id target,
enum pm_ret_status pm_abort_suspend(enum pm_abort_reason reason);
enum pm_ret_status pm_req_wakeup(enum pm_node_id target,
- unsigned int set_address,
+ uint32_t set_address,
uintptr_t address,
enum pm_request_ack ack);
enum pm_ret_status pm_set_wakeup_source(enum pm_node_id target,
enum pm_node_id wkup_node,
- unsigned int enable);
+ uint32_t enable);
-enum pm_ret_status pm_system_shutdown(unsigned int type, unsigned int subtype);
+enum pm_ret_status pm_system_shutdown(uint32_t type, uint32_t subtype);
enum pm_ret_status pm_init_suspend_cb(enum pm_suspend_reason reason,
- unsigned int latency,
- unsigned int state,
- unsigned int timeout);
+ uint32_t latency,
+ uint32_t state,
+ uint32_t timeout);
/* API functions for managing PM Slaves */
enum pm_ret_status pm_req_node(enum pm_node_id nid,
- unsigned int capabilities,
- unsigned int qos,
+ uint32_t capabilities,
+ uint32_t qos,
enum pm_request_ack ack);
enum pm_ret_status pm_set_requirement(enum pm_node_id nid,
- unsigned int capabilities,
- unsigned int qos,
+ uint32_t capabilities,
+ uint32_t qos,
enum pm_request_ack ack);
/* Miscellaneous API functions */
-enum pm_ret_status pm_get_api_version(unsigned int *version);
+enum pm_ret_status pm_get_api_version(uint32_t *version);
enum pm_ret_status pm_get_node_status(enum pm_node_id nid,
uint32_t *ret_buff);
enum pm_ret_status pm_acknowledge_cb(enum pm_node_id nid,
enum pm_ret_status status,
- unsigned int oppoint);
+ uint32_t oppoint);
enum pm_ret_status pm_notify_cb(enum pm_node_id nid,
- unsigned int event,
- unsigned int oppoint);
+ uint32_t event,
+ uint32_t oppoint);
/* Direct-Control API functions */
enum pm_ret_status pm_mmio_write(uintptr_t address,
- unsigned int mask,
- unsigned int value);
-enum pm_ret_status pm_mmio_read(uintptr_t address, unsigned int *value);
+ uint32_t mask,
+ uint32_t value);
+enum pm_ret_status pm_mmio_read(uintptr_t address, uint32_t *value);
enum pm_ret_status pm_fpga_load(uint32_t address_low,
uint32_t address_high,
uint32_t size,
uint32_t flags);
-enum pm_ret_status pm_fpga_get_status(unsigned int *value);
+enum pm_ret_status pm_fpga_get_status(uint32_t *value);
enum pm_ret_status pm_get_chipid(uint32_t *value);
enum pm_ret_status pm_secure_rsaaes(uint32_t address_low,
unsigned int pm_get_shutdown_scope(void);
void pm_get_callbackdata(uint32_t *data, size_t count);
enum pm_ret_status pm_ioctl(enum pm_node_id nid,
- unsigned int ioctl_id,
- unsigned int arg1,
- unsigned int arg2,
- unsigned int *value);
-enum pm_ret_status pm_clock_enable(unsigned int clock_id);
-enum pm_ret_status pm_clock_disable(unsigned int clock_id);
-enum pm_ret_status pm_clock_getstate(unsigned int clock_id,
- unsigned int *state);
-enum pm_ret_status pm_clock_setdivider(unsigned int clock_id,
- unsigned int divider);
-enum pm_ret_status pm_clock_getdivider(unsigned int clock_id,
- unsigned int *divider);
-enum pm_ret_status pm_clock_setrate(unsigned int clock_id,
+ uint32_t ioctl_id,
+ uint32_t arg1,
+ uint32_t arg2,
+ uint32_t *value);
+enum pm_ret_status pm_clock_enable(uint32_t clock_id);
+enum pm_ret_status pm_clock_disable(uint32_t clock_id);
+enum pm_ret_status pm_clock_getstate(uint32_t clock_id,
+ uint32_t *state);
+enum pm_ret_status pm_clock_setdivider(uint32_t clock_id,
+ uint32_t divider);
+enum pm_ret_status pm_clock_getdivider(uint32_t clock_id,
+ uint32_t *divider);
+enum pm_ret_status pm_clock_setrate(uint32_t clock_id,
uint64_t rate);
-enum pm_ret_status pm_clock_getrate(unsigned int clock_id,
+enum pm_ret_status pm_clock_getrate(uint32_t clock_id,
uint64_t *rate);
-enum pm_ret_status pm_clock_setparent(unsigned int clock_id,
- unsigned int parent_index);
-enum pm_ret_status pm_clock_getparent(unsigned int clock_id,
- unsigned int *parent_index);
-void pm_query_data(enum pm_query_id qid, unsigned int arg1, unsigned int arg2,
- unsigned int arg3, unsigned int *data);
+enum pm_ret_status pm_clock_setparent(uint32_t clock_id,
+ uint32_t parent_index);
+enum pm_ret_status pm_clock_getparent(uint32_t clock_id,
+ uint32_t *parent_index);
+void pm_query_data(enum pm_query_id qid, uint32_t arg1, uint32_t arg2,
+ uint32_t arg3, uint32_t *data);
enum pm_ret_status pm_sha_hash(uint32_t address_high,
uint32_t address_low,
uint32_t size,
enum pm_ret_status pm_aes_engine(uint32_t address_high,
uint32_t address_low,
uint32_t *value);
-enum pm_ret_status pm_register_access(unsigned int register_access_id,
- unsigned int address,
- unsigned int mask,
- unsigned int value,
- unsigned int *out);
+enum pm_ret_status pm_register_access(uint32_t register_access_id,
+ uint32_t address,
+ uint32_t mask,
+ uint32_t value,
+ uint32_t *out);
enum pm_ret_status pm_pll_set_parameter(enum pm_node_id nid,
enum pm_pll_param param_id,
- unsigned int value);
+ uint32_t value);
enum pm_ret_status pm_pll_get_parameter(enum pm_node_id nid,
enum pm_pll_param param_id,
- unsigned int *value);
+ uint32_t *value);
enum pm_ret_status pm_pll_set_mode(enum pm_node_id nid, enum pm_pll_mode mode);
enum pm_ret_status pm_pll_get_mode(enum pm_node_id nid, enum pm_pll_mode *mode);
enum pm_ret_status pm_efuse_access(uint32_t address_high,
uint32_t address_low, uint32_t *value);
-enum pm_ret_status em_set_action(unsigned int *value);
-enum pm_ret_status em_remove_action(unsigned int *value);
-enum pm_ret_status em_send_errors(unsigned int *value);
-enum pm_ret_status pm_feature_config(unsigned int ioctl_id,
- unsigned int config_id,
- unsigned int value,
- unsigned int *response);
+enum pm_ret_status em_set_action(uint32_t *value);
+enum pm_ret_status em_remove_action(uint32_t *value);
+enum pm_ret_status em_send_errors(uint32_t *value);
+enum pm_ret_status pm_feature_config(uint32_t ioctl_id,
+ uint32_t config_id,
+ uint32_t value,
+ uint32_t *response);
enum pm_ret_status pm_feature_check(uint32_t api_id, uint32_t *version,
uint32_t *bit_mask, uint8_t len);
enum pm_ret_status check_api_dependency(uint8_t id);
*
* Return: PM node ID corresponding to the specified interrupt
*/
-static enum pm_node_id irq_to_pm_node(unsigned int irq)
+static enum pm_node_id irq_to_pm_node(uint32_t irq)
{
assert(irq <= IRQ_MAX);
return irq_node_map[irq];
*
* Return: pointer to a proc structure if proc is found, otherwise NULL
*/
-const struct pm_proc *pm_get_proc(unsigned int cpuid)
+const struct pm_proc *pm_get_proc(uint32_t cpuid)
{
if (cpuid < ARRAY_SIZE(pm_procs_all)) {
return &pm_procs_all[cpuid];
*
* Return: the cpu ID (starting from 0) for the subsystem
*/
-static unsigned int pm_get_cpuid(enum pm_node_id nid)
+static uint32_t pm_get_cpuid(enum pm_node_id nid)
{
for (size_t i = 0; i < ARRAY_SIZE(pm_procs_all); i++) {
if (pm_procs_all[i].node_id == nid) {
* required prior to sending suspend request to PMU
* Actions taken depend on the state system is suspending to.
*/
-void pm_client_suspend(const struct pm_proc *proc, unsigned int state)
+void pm_client_suspend(const struct pm_proc *proc, uint32_t state)
{
bakery_lock_get(&pm_client_secure_lock);
*/
void pm_client_wakeup(const struct pm_proc *proc)
{
- unsigned int cpuid = pm_get_cpuid(proc->node_id);
+ uint32_t cpuid = pm_get_cpuid(proc->node_id);
if (cpuid == UNDEFINED_CPUID) {
return;
* Called from sip_svc_setup initialization function with the
* rt_svc_init signature.
*/
-int pm_setup(void)
+int32_t pm_setup(void)
{
- int status, ret;
+ int32_t status, ret;
status = pm_ipi_init(primary_proc);
case PM_REQ_WAKEUP:
{
/* Use address flag is encoded in the 1st bit of the low-word */
- unsigned int set_addr = pm_arg[1] & 0x1;
+ uint32_t set_addr = pm_arg[1] & 0x1;
uint64_t address = (uint64_t)pm_arg[2] << 32;
address |= pm_arg[1] & (~0x1);
#include "pm_common.h"
-int pm_setup(void);
+int32_t pm_setup(void);
uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
uint64_t x4, void *cookie, void *handle,
uint64_t flags);