Tegra: verify platform compatibility

This patch verifies that the binary image is compatible with
chip ID of the platform.

Change-Id: I28db221b4442aa8827a092faadf32f110d7c5cb4
Signed-off-by: kalyanic <kalyanic@nvidia.com>

diff --git a/plat/nvidia/tegra/soc/t132/plat_setup.c b/plat/nvidia/tegra/soc/t132/plat_setup.c
index 43acdd6425d934d59f7bb07d59b910efd54051b8..f7b134d15f82c30e8a6fc20df753c9dc4efd2e47 100644 (file)
--- a/plat/nvidia/tegra/soc/t132/plat_setup.c
+++ b/plat/nvidia/tegra/soc/t132/plat_setup.c
@@ -6,6 +6,7 @@
  */
 
 #include <arch_helpers.h>
+#include <assert.h>
 #include <common/bl_common.h>
 #include <drivers/console.h>
 #include <lib/xlat_tables/xlat_tables_v2.h>
@@ -144,7 +145,8 @@ plat_params_from_bl2_t *plat_get_bl31_plat_params(void)
  ******************************************************************************/
 void plat_early_platform_setup(void)
 {
-       ; /* do nothing */
+       /* Verify chip id is t132 */
+       assert(tegra_chipid_is_t132());
 }
 
 /*******************************************************************************

diff --git a/plat/nvidia/tegra/soc/t186/plat_setup.c b/plat/nvidia/tegra/soc/t186/plat_setup.c
index c216b5d512d60bcbb779d96c4abf1ecc19b46c73..03182d789ad359c287b78a792b2d49dda13c8bb1 100644 (file)
--- a/plat/nvidia/tegra/soc/t186/plat_setup.c
+++ b/plat/nvidia/tegra/soc/t186/plat_setup.c
@@ -186,6 +186,9 @@ void plat_early_platform_setup(void)
        uint64_t impl, val;
        const plat_params_from_bl2_t *plat_params = bl31_get_plat_params();
 
+       /* Verify chip id is t186 */
+       assert(tegra_chipid_is_t186());
+
        /* sanity check MCE firmware compatibility */
        mce_verify_firmware_version();
 

diff --git a/plat/nvidia/tegra/soc/t194/plat_setup.c b/plat/nvidia/tegra/soc/t194/plat_setup.c
index 399aebb05b857fd995415a150e9584e514e36c7b..09611787b204b466afdc128a26dd9a54ae2af3b0 100644 (file)
--- a/plat/nvidia/tegra/soc/t194/plat_setup.c
+++ b/plat/nvidia/tegra/soc/t194/plat_setup.c
@@ -205,6 +205,9 @@ void plat_early_platform_setup(void)
        uint8_t enable_ccplex_lock_step = params_from_bl2->enable_ccplex_lock_step;
        uint64_t actlr_elx;
 
+       /* Verify chip id is t194 */
+       assert(tegra_chipid_is_t194());
+
        /* sanity check MCE firmware compatibility */
        mce_verify_firmware_version();
 

diff --git a/plat/nvidia/tegra/soc/t210/plat_setup.c b/plat/nvidia/tegra/soc/t210/plat_setup.c
index f2b267b21f8f051acf76ceb4c0e9b3954c8a407f..a16f302a697b777175acbe9cf1d13f66944b8b5d 100644 (file)
--- a/plat/nvidia/tegra/soc/t210/plat_setup.c
+++ b/plat/nvidia/tegra/soc/t210/plat_setup.c
@@ -165,6 +165,9 @@ void plat_early_platform_setup(void)
        const plat_params_from_bl2_t *plat_params = bl31_get_plat_params();
        uint64_t val;
 
+       /* Verify chip id is t210 */
+       assert(tegra_chipid_is_t210());
+
        /* platform parameter passed by the previous bootloader */
        if (plat_params->l2_ecc_parity_prot_dis != 1) {
                /* Enable ECC Parity Protection for Cortex-A57 CPUs */