plat: imx8m: Correct the imr mask reg offset

The number of gpc imr mask reg & the offset is different
on some SOC, so correct it & replace the magic number with
macro define.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Ic701675cdd92e043dcd7f06722f2e871068aec74

diff --git a/plat/imx/imx8m/gpc_common.c b/plat/imx/imx8m/gpc_common.c
index 8aae1a62b469798b1e21dc029165362ac529803f..babcecff084429961c978ed3ea2d97eb5e9d0c85 100644 (file)
--- a/plat/imx/imx8m/gpc_common.c
+++ b/plat/imx/imx8m/gpc_common.c
@@ -16,7 +16,7 @@
 #include <imx8m_psci.h>
 #include <plat_imx8.h>
 
-static uint32_t gpc_imr_offset[] = { 0x30, 0x40, 0x1c0, 0x1d0, };
+static uint32_t gpc_imr_offset[] = { IMR1_CORE0_A53, IMR1_CORE1_A53, IMR1_CORE2_A53, IMR1_CORE3_A53, };
 
 #pragma weak imx_set_cpu_pwr_off
 #pragma weak imx_set_cpu_pwr_on

diff --git a/plat/imx/imx8m/imx8mm/include/gpc_reg.h b/plat/imx/imx8m/imx8mm/include/gpc_reg.h
index c697af29b502835125f48b8c826cf358129c7e0e..1a4eae546327ef416eb417e39ef9aa5477e641cb 100644 (file)
--- a/plat/imx/imx8m/imx8mm/include/gpc_reg.h
+++ b/plat/imx/imx8m/imx8mm/include/gpc_reg.h
@@ -124,4 +124,6 @@
 #define VPU_G2_PGC                     0xf00
 #define VPU_H1_PGC                     0xf40
 
+#define IRQ_IMR_NUM                    U(4)
+
 #endif /* GPC_REG_H */

diff --git a/plat/imx/imx8m/imx8mn/include/gpc_reg.h b/plat/imx/imx8m/imx8mn/include/gpc_reg.h
index fd10438a469c3abee10c08cb228aded9af2e2dc8..8a813681466883e19810276fc3b6ecaba5201594 100644 (file)
--- a/plat/imx/imx8m/imx8mn/include/gpc_reg.h
+++ b/plat/imx/imx8m/imx8mn/include/gpc_reg.h
@@ -106,4 +106,6 @@
 #define GPUMIX_PGC                     0xdc0
 #define DISPMIX_PGC                    0xe80
 
+#define IRQ_IMR_NUM                    U(4)
+
 #endif /* GPC_REG_H */

diff --git a/plat/imx/imx8m/imx8mp/include/gpc_reg.h b/plat/imx/imx8m/imx8mp/include/gpc_reg.h
index 12da6ac7e33b8103c285f545bdbd5be75fdcfb58..7909937b2e6b4cb44bbfcc250cccbc5e3fdfd910 100644 (file)
--- a/plat/imx/imx8m/imx8mp/include/gpc_reg.h
+++ b/plat/imx/imx8m/imx8mp/include/gpc_reg.h
@@ -146,4 +146,6 @@
 #define MEDIAMIX_ISPDWP_PGC            0xf80
 #define DDRMIX_PGC                     0xfc0
 
+#define IRQ_IMR_NUM                    U(5)
+
 #endif /* GPC_REG_H */

diff --git a/plat/imx/imx8m/imx8mq/include/gpc_reg.h b/plat/imx/imx8m/imx8mq/include/gpc_reg.h
index 9f472d609e43612e8a8d20bcd26fafbf6477a71b..f171bd9d02a422bfa857fd3c2426cbf7550ed1a6 100644 (file)
--- a/plat/imx/imx8m/imx8mq/include/gpc_reg.h
+++ b/plat/imx/imx8m/imx8mq/include/gpc_reg.h
@@ -84,4 +84,6 @@
 #define MASTER1_MAPPING                        BIT(1)
 #define MASTER2_MAPPING                        BIT(2)
 
+#define IRQ_IMR_NUM                    U(4)
+
 #endif /* GPC_REG_H */

diff --git a/plat/imx/imx8m/include/gpc.h b/plat/imx/imx8m/include/gpc.h
index 89a0b9d396dc61a8073b719e9e9b25b92d125ebc..6f86e1d6bd124bf901861a5aac4a5f4077985294 100644 (file)
--- a/plat/imx/imx8m/include/gpc.h
+++ b/plat/imx/imx8m/include/gpc.h
@@ -25,7 +25,6 @@
 #define SLTx_CFG(n)                    ((SLT0_CFG + ((n) * 4)))
 #define SLT_COREx_PUP(core_id)         (0x2 << ((core_id) * 2))
 
-#define IRQ_IMR_NUM    4
 #define IMR_MASK_ALL   0xffffffff
 
 #define IMX_PD_DOMAIN(name, on)                                \