]> git.baikalelectronics.ru Git - arm-tf.git/commitdiff
Tegra210: support for secure physical timer
authorVarun Wadekar <vwadekar@nvidia.com>
Fri, 10 Aug 2018 17:17:31 +0000 (10:17 -0700)
committerVarun Wadekar <vwadekar@nvidia.com>
Wed, 11 Mar 2020 20:40:07 +0000 (13:40 -0700)
This patch enables on-chip timer1 interrupts for Tegra210 platforms.

Change-Id: Ic7417dc0e69264d7c28aa012fe2322cd30838f3e
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
plat/nvidia/tegra/include/t210/tegra_def.h
plat/nvidia/tegra/soc/t210/plat_setup.c

index e8bce5e05519cf4822c481472e2e84ba07c5a1a8..f3013a8a5ba18d0ca1a7becec40c8f14cc3cc58d 100644 (file)
  ******************************************************************************/
 #define SC7ENTRY_FW_HEADER_SIZE_BYTES  U(0x400)
 
+/*******************************************************************************
+ * Counter-timer physical secure timer PPI
+ ******************************************************************************/
+#define TEGRA210_TIMER1_IRQ            32
+
 /*******************************************************************************
  * iRAM memory constants
  ******************************************************************************/
index 933e925ec4c8e0769d9c08586c0a0330364b4cb7..6d014bf2c75c0d1585bd9b91aa32a3b03e0ba2f3 100644 (file)
@@ -179,6 +179,8 @@ void plat_early_platform_setup(void)
 
 /* Secure IRQs for Tegra186 */
 static const interrupt_prop_t tegra210_interrupt_props[] = {
+       INTR_PROP_DESC(TEGRA210_TIMER1_IRQ, GIC_HIGHEST_SEC_PRIORITY,
+                       GICV2_INTR_GROUP0, GIC_INTR_CFG_EDGE),
        INTR_PROP_DESC(TEGRA210_WDT_CPU_LEGACY_FIQ, GIC_HIGHEST_SEC_PRIORITY,
                        GICV2_INTR_GROUP0, GIC_INTR_CFG_EDGE),
 };