Add CPULib for Klein Core

Change-Id: I686fd623b8264c85434853a2a26ecd71e9eeac01
Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>

diff --git a/include/lib/cpus/aarch64/cortex_klein.h b/include/lib/cpus/aarch64/cortex_klein.h
new file mode 100644 (file)
index 0000000..729b3bf
--- /dev/null
+++ b/include/lib/cpus/aarch64/cortex_klein.h
@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2020, ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef CORTEX_KLEIN_H
+#define CORTEX_KLEIN_H
+
+#define CORTEX_KLEIN_MIDR                                      U(0x410FD460)
+
+/*******************************************************************************
+ * CPU Extended Control register specific definitions
+ ******************************************************************************/
+#define CORTEX_KLEIN_CPUECTLR_EL1                              S3_0_C15_C1_4
+
+/*******************************************************************************
+ * CPU Power Control register specific definitions
+ ******************************************************************************/
+#define CORTEX_KLEIN_CPUPWRCTLR_EL1                            S3_0_C15_C2_7
+#define CORTEX_KLEIN_CPUPWRCTLR_EL1_CORE_PWRDN_BIT             U(1)
+
+#endif /* CORTEX_KLEIN_H */

diff --git a/lib/cpus/aarch64/cortex_klein.S b/lib/cpus/aarch64/cortex_klein.S
new file mode 100644 (file)
index 0000000..d3a8ab4
--- /dev/null
+++ b/lib/cpus/aarch64/cortex_klein.S
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2020, ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <arch.h>
+#include <asm_macros.S>
+#include <common/bl_common.h>
+#include <cortex_klein.h>
+#include <cpu_macros.S>
+#include <plat_macros.S>
+
+/* Hardware handled coherency */
+#if HW_ASSISTED_COHERENCY == 0
+#error "Cortex Klein must be compiled with HW_ASSISTED_COHERENCY enabled"
+#endif
+
+/* 64-bit only core */
+#if CTX_INCLUDE_AARCH32_REGS == 1
+#error "Cortex Klein supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0"
+#endif
+
+       /* ----------------------------------------------------
+        * HW will do the cache maintenance while powering down
+        * ----------------------------------------------------
+        */
+func cortex_klein_core_pwr_dwn
+       /* ---------------------------------------------------
+        * Enable CPU power down bit in power control register
+        * ---------------------------------------------------
+        */
+       mrs     x0, CORTEX_KLEIN_CPUPWRCTLR_EL1
+       orr     x0, x0, #CORTEX_KLEIN_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
+       msr     CORTEX_KLEIN_CPUPWRCTLR_EL1, x0
+       isb
+       ret
+endfunc cortex_klein_core_pwr_dwn
+
+       /*
+        * Errata printing function for Cortex Klein. Must follow AAPCS.
+        */
+#if REPORT_ERRATA
+func cortex_klein_errata_report
+       ret
+endfunc cortex_klein_errata_report
+#endif
+
+func cortex_klein_reset_func
+       /* Disable speculative loads */
+       msr     SSBS, xzr
+       isb
+       ret
+endfunc cortex_klein_reset_func
+
+       /* ---------------------------------------------
+        * This function provides Cortex-Klein specific
+        * register information for crash reporting.
+        * It needs to return with x6 pointing to
+        * a list of register names in ascii and
+        * x8 - x15 having values of registers to be
+        * reported.
+        * ---------------------------------------------
+        */
+.section .rodata.cortex_klein_regs, "aS"
+cortex_klein_regs:  /* The ascii list of register names to be reported */
+       .asciz  "cpuectlr_el1", ""
+
+func cortex_klein_cpu_reg_dump
+       adr     x6, cortex_klein_regs
+       mrs     x8, CORTEX_KLEIN_CPUECTLR_EL1
+       ret
+endfunc cortex_klein_cpu_reg_dump
+
+declare_cpu_ops cortex_klein, CORTEX_KLEIN_MIDR, \
+       cortex_klein_reset_func, \
+       cortex_klein_core_pwr_dwn

diff --git a/plat/arm/board/fvp/platform.mk b/plat/arm/board/fvp/platform.mk
index 60374352a846528143509f3dffcaf554b58f7e03..65dc5457f921b96ebf78117f3f00c1d454ecc3ab 100644 (file)
--- a/plat/arm/board/fvp/platform.mk
+++ b/plat/arm/board/fvp/platform.mk
@@ -122,6 +122,7 @@ else
                                        lib/cpus/aarch64/neoverse_zeus.S        \
                                        lib/cpus/aarch64/cortex_hercules.S      \
                                        lib/cpus/aarch64/cortex_hercules_ae.S   \
+                                       lib/cpus/aarch64/cortex_klein.S         \
                                        lib/cpus/aarch64/cortex_a65.S           \
                                        lib/cpus/aarch64/cortex_a65ae.S
        endif