Add myself and Andre Przywara as code owners for the Arm FPGA platform port

Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>
Change-Id: I6d3949a971fada5a086b788dbe274f8451fcfc0d

diff --git a/docs/about/maintainers.rst b/docs/about/maintainers.rst
index bf29186d5d1843029a74b8db7dbb5d88899f5cd3..ea9a4f58ae70c7f9f0e5afcbc3bfa3d102bf69d6 100644 (file)
--- a/docs/about/maintainers.rst
+++ b/docs/about/maintainers.rst
@@ -320,6 +320,14 @@ Amlogic Meson A113D (AXG) platform port
 :F: docs/plat/meson-axg.rst
 :F: plat/amlogic/axg/
 
+Arm FPGA platform port
+^^^^^^^^^^^^^^^^^^^^^^
+:M: Andre Przywara <andre.przywara@arm.com>
+:G: `Andre-ARM`_
+:M: Javier Almansa Sobrino <Javier.AlmansaSobrino@arm.com>
+:G: `javieralso-arm`_
+:F: plat/arm/board/arm_fpga
+
 Arm System Guidance for Infrastructure / Mobile FVP platforms
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 :M: Nariman Poushin <nariman.poushin@linaro.org>