KVM: SVM: Introduce logic to (de)activate x2AVIC mode

Introduce logic to (de)activate AVIC, which also allows
switching between AVIC to x2AVIC mode at runtime.

When an AVIC-enabled guest switches from APIC to x2APIC mode,
the SVM driver needs to perform the following steps:

1. Set the x2APIC mode bit for AVIC in VMCB along with the maximum
APIC ID support for each mode accodingly.

2. Disable x2APIC MSRs interception in order to allow the hardware
to virtualize x2APIC MSRs accesses.

Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Message-Id: <20220519102709.24125-12-suravee.suthikulpanit@amd.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h
index ed4b83d7f09e18e3b3a8a71b7b1b2e60b9dfb44b..0361626841bc00da38c9dd1713e6995914d29e5c 100644 (file)
--- a/arch/x86/include/asm/svm.h
+++ b/arch/x86/include/asm/svm.h
@@ -256,6 +256,7 @@ enum avic_ipi_failure_cause {
        AVIC_IPI_FAILURE_INVALID_BACKING_PAGE,
 };
 
+#define AVIC_PHYSICAL_MAX_INDEX_MASK   GENMASK_ULL(9, 0)
 
 /*
  * For AVIC, the max index allowed for physical APIC ID

diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c
index eb7060d3327bb6e97c344b3f2d301cdfdef65f11..c7db96428b19c63ff852070e02c1104aa4969160 100644 (file)
--- a/arch/x86/kvm/svm/avic.c
+++ b/arch/x86/kvm/svm/avic.c
@@ -63,6 +63,36 @@ struct amd_svm_iommu_ir {
        void *data;             /* Storing pointer to struct amd_ir_data */
 };
 
+static void avic_activate_vmcb(struct vcpu_svm *svm)
+{
+       struct vmcb *vmcb = svm->vmcb01.ptr;
+
+       vmcb->control.int_ctl &= ~(AVIC_ENABLE_MASK | X2APIC_MODE_MASK);
+       vmcb->control.avic_physical_id &= ~AVIC_PHYSICAL_MAX_INDEX_MASK;
+
+       vmcb->control.int_ctl |= AVIC_ENABLE_MASK;
+       if (apic_x2apic_mode(svm->vcpu.arch.apic)) {
+               vmcb->control.int_ctl |= X2APIC_MODE_MASK;
+               vmcb->control.avic_physical_id |= X2AVIC_MAX_PHYSICAL_ID;
+               /* Disabling MSR intercept for x2APIC registers */
+               svm_set_x2apic_msr_interception(svm, false);
+       } else {
+               vmcb->control.avic_physical_id |= AVIC_MAX_PHYSICAL_ID;
+               /* Enabling MSR intercept for x2APIC registers */
+               svm_set_x2apic_msr_interception(svm, true);
+       }
+}
+
+static void avic_deactivate_vmcb(struct vcpu_svm *svm)
+{
+       struct vmcb *vmcb = svm->vmcb01.ptr;
+
+       vmcb->control.int_ctl &= ~(AVIC_ENABLE_MASK | X2APIC_MODE_MASK);
+       vmcb->control.avic_physical_id &= ~AVIC_PHYSICAL_MAX_INDEX_MASK;
+
+       /* Enabling MSR intercept for x2APIC registers */
+       svm_set_x2apic_msr_interception(svm, true);
+}
 
 /* Note:
  * This function is called from IOMMU driver to notify
@@ -179,13 +209,12 @@ void avic_init_vmcb(struct vcpu_svm *svm, struct vmcb *vmcb)
        vmcb->control.avic_backing_page = bpa & AVIC_HPA_MASK;
        vmcb->control.avic_logical_id = lpa & AVIC_HPA_MASK;
        vmcb->control.avic_physical_id = ppa & AVIC_HPA_MASK;
-       vmcb->control.avic_physical_id |= AVIC_MAX_PHYSICAL_ID;
        vmcb->control.avic_vapic_bar = APIC_DEFAULT_PHYS_BASE & VMCB_AVIC_APIC_BAR_MASK;
 
        if (kvm_apicv_activated(svm->vcpu.kvm))
-               vmcb->control.int_ctl |= AVIC_ENABLE_MASK;
+               avic_activate_vmcb(svm);
        else
-               vmcb->control.int_ctl &= ~AVIC_ENABLE_MASK;
+               avic_deactivate_vmcb(svm);
 }
 
 static u64 *avic_get_physical_id_entry(struct kvm_vcpu *vcpu,
@@ -1049,9 +1078,9 @@ void avic_refresh_apicv_exec_ctrl(struct kvm_vcpu *vcpu)
                 * accordingly before re-activating.
                 */
                avic_apicv_post_state_restore(vcpu);
-               vmcb->control.int_ctl |= AVIC_ENABLE_MASK;
+               avic_activate_vmcb(svm);
        } else {
-               vmcb->control.int_ctl &= ~AVIC_ENABLE_MASK;
+               avic_deactivate_vmcb(svm);
        }
        vmcb_mark_dirty(vmcb, VMCB_AVIC);
 

diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 67ba0d3a7f6247452964cae8f1df475675226d09..491e4d549e2f67f509698cf079a6f1c4fee73a4f 100644 (file)
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -805,6 +805,24 @@ void svm_vcpu_init_msrpm(struct kvm_vcpu *vcpu, u32 *msrpm)
        }
 }
 
+void svm_set_x2apic_msr_interception(struct vcpu_svm *svm, bool intercept)
+{
+       int i;
+
+       if (avic_mode != AVIC_MODE_X2 ||
+           !apic_x2apic_mode(svm->vcpu.arch.apic))
+               return;
+
+       for (i = 0; i < MAX_DIRECT_ACCESS_MSRS; i++) {
+               int index = direct_access_msrs[i].index;
+
+               if ((index < APIC_BASE_MSR) ||
+                   (index > APIC_BASE_MSR + 0xff))
+                       continue;
+               set_msr_interception(&svm->vcpu, svm->msrpm, index,
+                                    !intercept, !intercept);
+       }
+}
 
 void svm_vcpu_free_msrpm(u32 *msrpm)
 {

diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h
index 288a1384aa0f483ad2bbdf215834954b98d5f4f4..ccaae7d160cd8ca49071f5510085c60a033c4bf1 100644 (file)
--- a/arch/x86/kvm/svm/svm.h
+++ b/arch/x86/kvm/svm/svm.h
@@ -555,6 +555,7 @@ void svm_set_gif(struct vcpu_svm *svm, bool value);
 int svm_invoke_exit_handler(struct kvm_vcpu *vcpu, u64 exit_code);
 void set_msr_interception(struct kvm_vcpu *vcpu, u32 *msrpm, u32 msr,
                          int read, int write);
+void svm_set_x2apic_msr_interception(struct vcpu_svm *svm, bool disable);
 void svm_complete_interrupt_delivery(struct kvm_vcpu *vcpu, int delivery_mode,
                                     int trig_mode, int vec);