arm64: dts: mediatek: Correct system timer clock of MT8192

When the initial devicetree for mt8192 was added in 4498fd5121ec ("arm64:
dts: Add Mediatek SoC MT8192 and evaluation board dts and Makefile"), the
clock driver for mt8192 was not yet upstream, so the clock property nodes
were set to the clk26m clock as a placeholder.

Given that the clock driver has since been added through 64713716ac75 ("clk:
mediatek: Add MT8192 basic clocks support"), as well as its dt-bindings
through f5126d20d0fe ("clk: mediatek: Add dt-bindings of MT8192 clocks") and
devicetree nodes through 0f9a1c380b38 ("arm64: dts: mediatek: Add mt8192
clock controllers"), fix the systimer clock property to point to the actual
clock.

Signed-off-by: Allen-KH Cheng <Allen-KH.Cheng@mediatek.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220113065822.11809-6-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 697fe2a272e89acebc077e06f604390f7319406a..cc3953df015399feb6a0a8255ae9d265d1313edd 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -312,7 +312,7 @@
                                     "mediatek,mt6765-timer";
                        reg = <0 0x10017000 0 0x1000>;
                        interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH 0>;
-                       clocks = <&clk26m>;
+                       clocks = <&topckgen CLK_TOP_CSW_F26M_D2>;
                        clock-names = "clk13m";
                };