feat(corstone1000): identify bank to load fip

Secure enclave decides the boot bank based on the firmware update
state of the system and updates the boot bank information at a given
location in the flash. In this commit, bl2 reads the given flash
location to indentify the bank from which it should load fip from.

Signed-off-by: Satish Kumar <satish.kumar01@arm.com>
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
Change-Id: I7f0f4ffc97189c9deb99db44afcd966082ffbf21

diff --git a/plat/arm/board/corstone1000/common/corstone1000_plat.c b/plat/arm/board/corstone1000/common/corstone1000_plat.c
index ffe60b160fa0f47db1843e4660efead40f4d28bd..a96baae061955bdae9bd5b1c8f9e42b4efebcf60 100644 (file)
--- a/plat/arm/board/corstone1000/common/corstone1000_plat.c
+++ b/plat/arm/board/corstone1000/common/corstone1000_plat.c
@@ -8,8 +8,12 @@
 
 #include <common/bl_common.h>
 
-#include <plat/arm/common/plat_arm.h>
+#include <drivers/generic_delay_timer.h>
+#include <drivers/io/io_storage.h>
 #include <plat/common/platform.h>
+#include <plat/arm/common/arm_fconf_getter.h>
+#include <plat/arm/common/arm_fconf_io_storage.h>
+#include <plat/arm/common/plat_arm.h>
 #include <platform_def.h>
 
 /*
@@ -26,6 +30,50 @@ const mmap_region_t plat_arm_mmap[] = {
        {0}
 };
 
+static void set_fip_image_source(void)
+{
+       const struct plat_io_policy *policy;
+       /*
+       * metadata for firmware update is written at 0x0000 offset of the flash.
+       * PLAT_ARM_BOOT_BANK_FLAG contains the boot bank that TF-M is booted.
+       * As per firmware update spec, at a given point of time, only one bank is active.
+       * This means, TF-A should boot from the same bank as TF-M.
+       */
+       volatile uint32_t *boot_bank_flag = (uint32_t *)(PLAT_ARM_BOOT_BANK_FLAG);
+       if (*boot_bank_flag > 1) {
+               VERBOSE("Boot_bank is set higher than possible values");
+       }
+
+       VERBOSE("Boot bank flag = %u.\n\r", *boot_bank_flag);
+
+       policy = FCONF_GET_PROPERTY(arm, io_policies, FIP_IMAGE_ID);
+
+       assert(policy != NULL);
+       assert(policy->image_spec != 0UL);
+
+       io_block_spec_t *spec = (io_block_spec_t *)policy->image_spec;
+
+       if ((*boot_bank_flag) == 0) {
+               VERBOSE("Booting from bank 0: fip offset = 0x%lx\n\r",
+                                               PLAT_ARM_FIP_BASE_BANK0);
+               spec->offset = PLAT_ARM_FIP_BASE_BANK0;
+       } else {
+               VERBOSE("Booting from bank 1: fip offset = 0x%lx\n\r",
+                                               PLAT_ARM_FIP_BASE_BANK1);
+               spec->offset = PLAT_ARM_FIP_BASE_BANK1;
+       }
+}
+
+void bl2_platform_setup(void)
+{
+       arm_bl2_platform_setup();
+       /*
+        * Identify the start address of the FIP by reading the boot
+        * index flag from the flash.
+        */
+       set_fip_image_source();
+}
+
 /* corstone1000 only has one always-on power domain and there
  * is no power control present
  */

diff --git a/plat/arm/board/corstone1000/common/include/platform_def.h b/plat/arm/board/corstone1000/common/include/platform_def.h
index ef1cc78e8832a43a955ee12914a052ec8ad79f71..2523d72b9f24e99c02085811e884416039e943a5 100644 (file)
--- a/plat/arm/board/corstone1000/common/include/platform_def.h
+++ b/plat/arm/board/corstone1000/common/include/platform_def.h
@@ -213,13 +213,15 @@
 
 /* NOR Flash */
 
-#define PLAT_ARM_FIP_BASE                                      UL(0x081EF000)
+#define PLAT_ARM_BOOT_BANK_FLAG                                        UL(0x08002000)
+#define PLAT_ARM_FIP_BASE_BANK0                                        UL(0x081EF000)
+#define PLAT_ARM_FIP_BASE_BANK1                                        UL(0x0916F000)
 #define PLAT_ARM_FIP_MAX_SIZE                                  UL(0x1ff000)  /* 1.996 MB */
 
 #define PLAT_ARM_NVM_BASE                                      V2M_FLASH0_BASE
 #define PLAT_ARM_NVM_SIZE                                      (SZ_32M)  /* 32 MB */
 
-#define PLAT_ARM_FLASH_IMAGE_BASE                              PLAT_ARM_FIP_BASE
+#define PLAT_ARM_FLASH_IMAGE_BASE                              PLAT_ARM_FIP_BASE_BANK0
 #define PLAT_ARM_FLASH_IMAGE_MAX_SIZE                          PLAT_ARM_FIP_MAX_SIZE
 
 /*