* and limit. Leave enough space of BL2 meminfo.
*/
#define ARM_FW_CONFIG_BASE (ARM_BL_RAM_BASE + sizeof(meminfo_t))
-#define ARM_FW_CONFIG_LIMIT (ARM_BL_RAM_BASE + (PAGE_SIZE / 2U))
+#define ARM_FW_CONFIG_LIMIT (ARM_BL_RAM_BASE + PAGE_SIZE)
/*
* Boot parameters passed from BL2 to BL31/BL32 are stored here
* Define limit of firmware configuration memory:
* ARM_FW_CONFIG + ARM_BL2_MEM_DESC memory
*/
-#define ARM_FW_CONFIGS_LIMIT (ARM_BL_RAM_BASE + PAGE_SIZE)
+#define ARM_FW_CONFIGS_LIMIT (ARM_BL_RAM_BASE + (PAGE_SIZE * 2))
/*******************************************************************************
* BL1 specific defines.
* calculated using the current BL31 PROGBITS debug size plus the sizes of
* BL2 and BL1-RW
*/
-#define PLAT_ARM_MAX_BL31_SIZE UL(0x3E000)
+#define PLAT_ARM_MAX_BL31_SIZE UL(0x3D000)
#endif /* RESET_TO_BL31 */
#ifndef __aarch64__
# define PLAT_ARM_MAX_BL2_SIZE (UL(0x1D000) - JUNO_BL2_ROMLIB_OPTIMIZATION)
#endif
#else
-# define PLAT_ARM_MAX_BL2_SIZE (UL(0x11000) - JUNO_BL2_ROMLIB_OPTIMIZATION)
+# define PLAT_ARM_MAX_BL2_SIZE (UL(0x13000) - JUNO_BL2_ROMLIB_OPTIMIZATION)
#endif
/*
* BL2 and BL1-RW. SCP_BL2 image is loaded into the space BL31 -> BL2_BASE.
* Hence the BL31 PROGBITS size should be >= PLAT_CSS_MAX_SCP_BL2_SIZE.
*/
-#define PLAT_ARM_MAX_BL31_SIZE UL(0x3E000)
+#define PLAT_ARM_MAX_BL31_SIZE UL(0x3D000)
#if JUNO_AARCH32_EL3_RUNTIME
/*
* BL2 and BL1-RW. SCP_BL2 image is loaded into the space BL32 -> BL2_BASE.
* Hence the BL32 PROGBITS size should be >= PLAT_CSS_MAX_SCP_BL2_SIZE.
*/
-#define PLAT_ARM_MAX_BL32_SIZE UL(0x3E000)
+#define PLAT_ARM_MAX_BL32_SIZE UL(0x3D000)
#endif
/*