stm32mp1: Add Avenger96 board support

Add board support for Avenger96 board from Arrow Electronics. This
board is based on STM32MP157A SoC and is one of the 96Boards Consumer
Edition platform.

More information about this board can be found in 96Boards website:
https://www.96boards.org/product/avenger96/

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Change-Id: Ic905f26c38d03883c6e4ea221b4b275a4b534857

diff --git a/fdts/stm32mp157-pinctrl.dtsi b/fdts/stm32mp157-pinctrl.dtsi
index 9dcd7b5e1788043382b1f1c4860a30efb2f5391d..c7553ca50dbda892f783dc0080b398bfbee7f6c5 100644 (file)
--- a/fdts/stm32mp157-pinctrl.dtsi
+++ b/fdts/stm32mp157-pinctrl.dtsi
@@ -273,6 +273,19 @@
                                };
                        };
 
+                       uart4_pins_b: uart4-1 {
+                               pins1 {
+                                       pinmux = <STM32_PINMUX('D', 1, AF8)>; /* UART4_TX */
+                                       bias-disable;
+                                       drive-push-pull;
+                                       slew-rate = <0>;
+                               };
+                               pins2 {
+                                       pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */
+                                       bias-disable;
+                               };
+                       };
+
                        usart3_pins_a: usart3-0 {
                                pins1 {
                                        pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */

diff --git a/fdts/stm32mp157a-avenger96.dts b/fdts/stm32mp157a-avenger96.dts
new file mode 100644 (file)
index 0000000..9df72b4
--- /dev/null
+++ b/fdts/stm32mp157a-avenger96.dts
@@ -0,0 +1,283 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) Arrow Electronics 2019 - All Rights Reserved
+ * Author: Botond Kardos <botond.kardos@arroweurope.com>
+ *
+ * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
+ * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+ */
+
+/dts-v1/;
+
+#include "stm32mp157c.dtsi"
+#include "stm32mp157cac-pinctrl.dtsi"
+
+/ {
+       model = "Arrow Electronics STM32MP157A Avenger96 board";
+       compatible = "st,stm32mp157a-avenger96", "st,stm32mp157";
+
+       aliases {
+               serial0 = &uart4;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+};
+
+&i2c4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&i2c4_pins_a>;
+       i2c-scl-rising-time-ns = <185>;
+       i2c-scl-falling-time-ns = <20>;
+       status = "okay";
+
+       pmic: stpmic@33 {
+               compatible = "st,stpmic1";
+               reg = <0x33>;
+               interrupts-extended = <&exti_pwr 55 IRQ_TYPE_EDGE_FALLING>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+               status = "okay";
+
+               st,main-control-register = <0x04>;
+               st,vin-control-register = <0xc0>;
+               st,usb-control-register = <0x20>;
+
+               regulators {
+                       compatible = "st,stpmic1-regulators";
+
+                       ldo1-supply = <&v3v3>;
+                       ldo2-supply = <&v3v3>;
+                       ldo3-supply = <&vdd_ddr>;
+                       ldo5-supply = <&v3v3>;
+                       ldo6-supply = <&v3v3>;
+
+                       vddcore: buck1 {
+                               regulator-name = "vddcore";
+                               regulator-min-microvolt = <1200000>;
+                               regulator-max-microvolt = <1350000>;
+                               regulator-always-on;
+                               regulator-initial-mode = <0>;
+                               regulator-over-current-protection;
+                       };
+
+                       vdd_ddr: buck2 {
+                               regulator-name = "vdd_ddr";
+                               regulator-min-microvolt = <1350000>;
+                               regulator-max-microvolt = <1350000>;
+                               regulator-always-on;
+                               regulator-initial-mode = <0>;
+                               regulator-over-current-protection;
+                       };
+
+                       vdd: buck3 {
+                               regulator-name = "vdd";
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                               st,mask-reset;
+                               regulator-initial-mode = <0>;
+                               regulator-over-current-protection;
+                       };
+
+                       v3v3: buck4 {
+                               regulator-name = "v3v3";
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+                               regulator-always-on;
+                               regulator-over-current-protection;
+                               regulator-initial-mode = <0>;
+                       };
+
+                       vdda: ldo1 {
+                               regulator-name = "vdda";
+                               regulator-min-microvolt = <2900000>;
+                               regulator-max-microvolt = <2900000>;
+                       };
+
+                       v2v8: ldo2 {
+                               regulator-name = "v2v8";
+                               regulator-min-microvolt = <2800000>;
+                               regulator-max-microvolt = <2800000>;
+                       };
+
+                       vtt_ddr: ldo3 {
+                               regulator-name = "vtt_ddr";
+                               regulator-min-microvolt = <500000>;
+                               regulator-max-microvolt = <750000>;
+                               regulator-always-on;
+                               regulator-over-current-protection;
+                       };
+
+                       vdd_usb: ldo4 {
+                               regulator-name = "vdd_usb";
+                               regulator-min-microvolt = <3300000>;
+                               regulator-max-microvolt = <3300000>;
+                       };
+
+                       vdd_sd: ldo5 {
+                               regulator-name = "vdd_sd";
+                               regulator-min-microvolt = <2900000>;
+                               regulator-max-microvolt = <2900000>;
+                               regulator-boot-on;
+                       };
+
+                       v1v8: ldo6 {
+                               regulator-name = "v1v8";
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                       };
+
+                       vref_ddr: vref_ddr {
+                               regulator-name = "vref_ddr";
+                               regulator-always-on;
+                               regulator-over-current-protection;
+                       };
+               };
+       };
+};
+
+&iwdg2 {
+       timeout-sec = <32>;
+       status = "okay";
+};
+
+&rng1 {
+       status = "okay";
+};
+
+&rtc {
+       status = "okay";
+};
+
+&sdmmc1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
+       broken-cd;
+       st,sig-dir;
+       st,neg-edge;
+       st,use-ckin;
+       bus-width = <4>;
+       vmmc-supply = <&vdda>;
+       status = "okay";
+};
+
+&uart4 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart4_pins_b>;
+       status = "okay";
+};
+
+/* ATF Specific */
+#include <dt-bindings/clock/stm32mp1-clksrc.h>
+#include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"
+#include "stm32mp157c-security.dtsi"
+
+/ {
+       aliases {
+               gpio0 = &gpioa;
+               gpio1 = &gpiob;
+               gpio2 = &gpioc;
+               gpio3 = &gpiod;
+               gpio4 = &gpioe;
+               gpio5 = &gpiof;
+               gpio6 = &gpiog;
+               gpio7 = &gpioh;
+               gpio8 = &gpioi;
+               gpio25 = &gpioz;
+               i2c3 = &i2c4;
+       };
+};
+
+/* CLOCK init */
+&rcc {
+       secure-status = "disabled";
+       st,clksrc = <
+               CLK_MPU_PLL1P
+               CLK_AXI_PLL2P
+               CLK_MCU_PLL3P
+               CLK_PLL12_HSE
+               CLK_PLL3_HSE
+               CLK_PLL4_HSE
+               CLK_RTC_LSE
+               CLK_MCO1_DISABLED
+               CLK_MCO2_DISABLED
+       >;
+
+       st,clkdiv = <
+               1 /*MPU*/
+               0 /*AXI*/
+               0 /*MCU*/
+               1 /*APB1*/
+               1 /*APB2*/
+               1 /*APB3*/
+               1 /*APB4*/
+               2 /*APB5*/
+               23 /*RTC*/
+               0 /*MCO1*/
+               0 /*MCO2*/
+       >;
+
+       st,pkcs = <
+               CLK_CKPER_HSE
+               CLK_FMC_ACLK
+               CLK_QSPI_ACLK
+               CLK_ETH_DISABLED
+               CLK_SDMMC12_PLL4P
+               CLK_DSI_DSIPLL
+               CLK_STGEN_HSE
+               CLK_USBPHY_HSE
+               CLK_SPI2S1_PLL3Q
+               CLK_SPI2S23_PLL3Q
+               CLK_SPI45_HSI
+               CLK_SPI6_HSI
+               CLK_I2C46_HSI
+               CLK_SDMMC3_PLL4P
+               CLK_USBO_USBPHY
+               CLK_ADC_CKPER
+               CLK_CEC_LSE
+               CLK_I2C12_HSI
+               CLK_I2C35_HSI
+               CLK_UART1_HSI
+               CLK_UART24_HSI
+               CLK_UART35_HSI
+               CLK_UART6_HSI
+               CLK_UART78_HSI
+               CLK_SPDIF_PLL4P
+               CLK_FDCAN_PLL4Q
+               CLK_SAI1_PLL3Q
+               CLK_SAI2_PLL3Q
+               CLK_SAI3_PLL3Q
+               CLK_SAI4_PLL3Q
+               CLK_RNG1_LSI
+               CLK_RNG2_LSI
+               CLK_LPTIM1_PCLK1
+               CLK_LPTIM23_PCLK3
+               CLK_LPTIM45_LSE
+       >;
+
+       /* VCO = 1300.0 MHz => P = 650 (CPU) */
+       pll1: st,pll@0 {
+               cfg = < 2 80 0 0 0 PQR(1,0,0) >;
+               frac = < 0x800 >;
+       };
+
+       /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
+       pll2: st,pll@1 {
+               cfg = < 2 65 1 0 0 PQR(1,1,1) >;
+               frac = < 0x1400 >;
+       };
+
+       /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
+       pll3: st,pll@2 {
+               cfg = < 1 33 1 16 36 PQR(1,1,1) >;
+               frac = < 0x1a04 >;
+       };
+
+       /* VCO = 480.0 MHz => P = 120, Q = 40, R = 96 */
+       pll4: st,pll@3 {
+               cfg = < 1 39 3 11 4 PQR(1,1,1) >;
+       };
+};