rcar_gen3: drivers: ddr: Update DDR setting for H3, M3, M3N

[IPL/DDR]
- Update H3, M3, M3N DDR setting rev.0.40.

Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> # upstream update
Change-Id: If675796a2314e769602af21bf5cc6b10962d4f29

diff --git a/drivers/renesas/rcar/ddr/ddr_b/boot_init_dram.c b/drivers/renesas/rcar/ddr/ddr_b/boot_init_dram.c
index 1234fb66741c8d0ccd697e568f8a6ba8cb9c5b6f..ac83c9a107b8d14ff6daf7c8c747fbf1e5db279b 100644 (file)
--- a/drivers/renesas/rcar/ddr/ddr_b/boot_init_dram.c
+++ b/drivers/renesas/rcar/ddr/ddr_b/boot_init_dram.c
@@ -2080,8 +2080,8 @@ static void dbsc_regset(void)
        /* DBTR9.TRDPR : tRTP */
        mmio_write_32(DBSC_DBTR(9), js2[js2_trtp]);
 
-       /* DBTR10.TWR : nWR + 1 */
-       mmio_write_32(DBSC_DBTR(10), js1[js1_ind].nwr + 1);
+       /* DBTR10.TWR : nWR */
+       mmio_write_32(DBSC_DBTR(10), js1[js1_ind].nwr);
 
        /*
         * DBTR11.TRDWR : RL +  BL / 2 + Rounddown(tRPST) + PHY_ODTLoff -

diff --git a/drivers/renesas/rcar/ddr/ddr_b/boot_init_dram_regdef.h b/drivers/renesas/rcar/ddr/ddr_b/boot_init_dram_regdef.h
index dc153a67f0350a0406ee6c711874a2448ac28a3a..56363eb997d8fe386c76d3b4cbacd2a7b92000a7 100644 (file)
--- a/drivers/renesas/rcar/ddr/ddr_b/boot_init_dram_regdef.h
+++ b/drivers/renesas/rcar/ddr/ddr_b/boot_init_dram_regdef.h
@@ -5,7 +5,7 @@
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#define RCAR_DDR_VERSION       "rev.0.39"
+#define RCAR_DDR_VERSION       "rev.0.40"
 #define DRAM_CH_CNT            0x04
 #define SLICE_CNT              0x04
 #define CS_CNT                 0x02