drm/amd/display: Fix DCN32 DSC delay calculation

[Why]
DCN32 DSC delay calculation had an unintentional integer division,
resulting in a mismatch against the DML spreadsheet.

[How]
Cast numerator to double before performing the division.

Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: George Shen <george.shen@amd.com>
Tested-by: Mark Broadworth <mark.broadworth@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
index ad66e241f9ae21fb5a0b54e81ba7a9b7143b418d..4a3e7a5d2758e6349e74fe6637dde96edfc4a708 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
@@ -1746,7 +1746,7 @@ unsigned int dml32_DSCDelayRequirement(bool DSCEnabled,
                }
 
                DSCDelayRequirement_val = DSCDelayRequirement_val + (HTotal - HActive) *
-                               dml_ceil(DSCDelayRequirement_val / HActive, 1);
+                               dml_ceil((double)DSCDelayRequirement_val / HActive, 1);
 
                DSCDelayRequirement_val = DSCDelayRequirement_val * PixelClock / PixelClockBackEnd;