drm/amd/display: trigger timing sync only if TG is running

commit 6066aaf74f510fc171dbe9375153aee2d60d37aa upstream

[Why&How]
If the timing generator isnt running, it does not make sense to trigger
a sync on the corresponding OTG. Check this condition before starting.
Otherwise, this will cause error like:

*ERROR* GSL: Timeout on reset trigger!

Fixes: dc55b106ad47 ("drm/amd/display: Disable phantom OTG after enable for plane disable")
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[ NOTE: This is also 5f9f97c02dd2 ("drm/amd/display: trigger timing sync
  only if TG is running") ]
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index a6fde27d13479f42eb0dbe89aaaeba092b404540..3940271189632a74f5886d249ef6f5e9cff9eb7f 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -2284,6 +2284,12 @@ void dcn10_enable_timing_synchronization(
                opp = grouped_pipes[i]->stream_res.opp;
                tg = grouped_pipes[i]->stream_res.tg;
                tg->funcs->get_otg_active_size(tg, &width, &height);
+
+               if (!tg->funcs->is_tg_enabled(tg)) {
+                       DC_SYNC_INFO("Skipping timing sync on disabled OTG\n");
+                       return;
+               }
+
                if (opp->funcs->opp_program_dpg_dimensions)
                        opp->funcs->opp_program_dpg_dimensions(opp, width, 2*(height) + 1);
        }