plat/arm/sgi: move topology information to board folder

The platform topology description of the upcoming Arm's RD platforms
have different topology than those listed in the sgi_topology.c file. So
instead of adding platform specific topology into existing
sgi_topology.c file, those can be added to respective board files. In
order to maintain consistency with the upcoming platforms, move the
existing platform topology description to respective board files.

Change-Id: I4689c7d24cd0c75a3dc234370c34a85c08598abb
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>

diff --git a/plat/arm/board/rde1edge/platform.mk b/plat/arm/board/rde1edge/platform.mk
index db41e0eda6802ed40a49dcf097c9427048a2d4da..43c37ffc11a3eea9ed3f3047e96e3c0f187f9eb2 100644 (file)
--- a/plat/arm/board/rde1edge/platform.mk
+++ b/plat/arm/board/rde1edge/platform.mk
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2018-2019, Arm Limited. All rights reserved.
+# Copyright (c) 2018-2020, Arm Limited. All rights reserved.
 #
 # SPDX-License-Identifier: BSD-3-Clause
 #
@@ -24,6 +24,7 @@ BL2_SOURCES           +=      ${RDE1EDGE_BASE}/rde1edge_plat.c        \
 
 BL31_SOURCES           +=      ${SGI_CPU_SOURCES}                      \
                                ${RDE1EDGE_BASE}/rde1edge_plat.c        \
+                               ${RDE1EDGE_BASE}/rde1edge_topology.c    \
                                drivers/cfi/v2m/v2m_flash.c             \
                                lib/utils/mem_region.c                  \
                                plat/arm/common/arm_nor_psci_mem_protect.c

diff --git a/plat/arm/board/rde1edge/rde1edge_topology.c b/plat/arm/board/rde1edge/rde1edge_topology.c
new file mode 100644 (file)
index 0000000..0b56f20
--- /dev/null
+++ b/plat/arm/board/rde1edge/rde1edge_topology.c
@@ -0,0 +1,33 @@
+/*
+ * Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <plat/arm/common/plat_arm.h>
+
+/******************************************************************************
+ * The power domain tree descriptor.
+ ******************************************************************************/
+static const unsigned char rde1edge_pd_tree_desc[] = {
+       PLAT_ARM_CLUSTER_COUNT,
+       CSS_SGI_MAX_CPUS_PER_CLUSTER,
+       CSS_SGI_MAX_CPUS_PER_CLUSTER
+};
+
+/******************************************************************************
+ * This function returns the topology tree information.
+ ******************************************************************************/
+const unsigned char *plat_get_power_domain_tree_desc(void)
+{
+       return rde1edge_pd_tree_desc;
+}
+
+/*******************************************************************************
+ * The array mapping platform core position (implemented by plat_my_core_pos())
+ * to the SCMI power domain ID implemented by SCP.
+ ******************************************************************************/
+const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[] = {
+       0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,           \
+       16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
+};

diff --git a/plat/arm/board/rdn1edge/platform.mk b/plat/arm/board/rdn1edge/platform.mk
index b44c70a3b4339480871067cbf9277be6ef16b436..ca1e95eaf08b3202c6de5bad62b975c847255a52 100644 (file)
--- a/plat/arm/board/rdn1edge/platform.mk
+++ b/plat/arm/board/rdn1edge/platform.mk
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
 #
 # SPDX-License-Identifier: BSD-3-Clause
 #
@@ -24,6 +24,7 @@ BL2_SOURCES           +=      ${RDN1EDGE_BASE}/rdn1edge_plat.c        \
 
 BL31_SOURCES           +=      ${SGI_CPU_SOURCES}                      \
                                ${RDN1EDGE_BASE}/rdn1edge_plat.c        \
+                               ${RDN1EDGE_BASE}/rdn1edge_topology.c    \
                                drivers/cfi/v2m/v2m_flash.c             \
                                lib/utils/mem_region.c                  \
                                plat/arm/common/arm_nor_psci_mem_protect.c

diff --git a/plat/arm/board/rdn1edge/rdn1edge_topology.c b/plat/arm/board/rdn1edge/rdn1edge_topology.c
new file mode 100644 (file)
index 0000000..687ae35
--- /dev/null
+++ b/plat/arm/board/rdn1edge/rdn1edge_topology.c
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <plat/arm/common/plat_arm.h>
+
+/******************************************************************************
+ * The power domain tree descriptor.
+ ******************************************************************************/
+static const unsigned char rdn1edge_pd_tree_desc[] = {
+       PLAT_ARM_CLUSTER_COUNT,
+       CSS_SGI_MAX_CPUS_PER_CLUSTER,
+       CSS_SGI_MAX_CPUS_PER_CLUSTER
+};
+
+/*******************************************************************************
+ * This function returns the topology tree information.
+ ******************************************************************************/
+const unsigned char *plat_get_power_domain_tree_desc(void)
+{
+       return rdn1edge_pd_tree_desc;
+}
+
+/*******************************************************************************
+ * The array mapping platform core position (implemented by plat_my_core_pos())
+ * to the SCMI power domain ID implemented by SCP.
+ ******************************************************************************/
+const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[] = {
+       0, 1, 2, 3, 4, 5, 6, 7
+};

diff --git a/plat/arm/board/sgi575/platform.mk b/plat/arm/board/sgi575/platform.mk
index b9fa0995d26c920c57882005468764b04bb2fec4..ce2717fe0296583a2eaa8f02bb6b0254f064fd95 100644 (file)
--- a/plat/arm/board/sgi575/platform.mk
+++ b/plat/arm/board/sgi575/platform.mk
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
 #
 # SPDX-License-Identifier: BSD-3-Clause
 #
@@ -24,6 +24,7 @@ BL2_SOURCES           +=      ${SGI575_BASE}/sgi575_plat.c            \
 
 BL31_SOURCES           +=      ${SGI_CPU_SOURCES}                      \
                                ${SGI575_BASE}/sgi575_plat.c            \
+                               ${SGI575_BASE}/sgi575_topology.c        \
                                drivers/cfi/v2m/v2m_flash.c             \
                                lib/utils/mem_region.c                  \
                                plat/arm/common/arm_nor_psci_mem_protect.c

diff --git a/plat/arm/board/sgi575/sgi575_topology.c b/plat/arm/board/sgi575/sgi575_topology.c
new file mode 100644 (file)
index 0000000..f7c3856
--- /dev/null
+++ b/plat/arm/board/sgi575/sgi575_topology.c
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <plat/arm/common/plat_arm.h>
+
+/******************************************************************************
+ * The power domain tree descriptor.
+ ******************************************************************************/
+static const unsigned char sgi575_pd_tree_desc[] = {
+       PLAT_ARM_CLUSTER_COUNT,
+       CSS_SGI_MAX_CPUS_PER_CLUSTER,
+       CSS_SGI_MAX_CPUS_PER_CLUSTER
+};
+
+/*******************************************************************************
+ * This function returns the topology tree information.
+ ******************************************************************************/
+const unsigned char *plat_get_power_domain_tree_desc(void)
+{
+       return sgi575_pd_tree_desc;
+}
+
+/*******************************************************************************
+ * The array mapping platform core position (implemented by plat_my_core_pos())
+ * to the SCMI power domain ID implemented by SCP.
+ ******************************************************************************/
+const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[] = {
+       0, 1, 2, 3, 4, 5, 6, 7
+};

diff --git a/plat/arm/css/sgi/sgi_topology.c b/plat/arm/css/sgi/sgi_topology.c
index 7aa9e40d353ce0cfe56908797f8646a7b0978a57..1c3b5bfc8776c7329fa57b7266278f4a50137e42 100644 (file)
--- a/plat/arm/css/sgi/sgi_topology.c
+++ b/plat/arm/css/sgi/sgi_topology.c
@@ -1,62 +1,14 @@
 /*
- * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
 #include <plat/arm/common/plat_arm.h>
-#include <plat/common/platform.h>
 
-#include <sgi_variant.h>
-
-/* Topology */
 /*
- * The power domain tree descriptor. The cluster power domains are
- * arranged so that when the PSCI generic code creates the power domain tree,
- * the indices of the CPU power domain nodes it allocates match the linear
- * indices returned by plat_core_pos_by_mpidr().
+ * Common topology related methods for SGI and RD based platforms
  */
-const unsigned char sgi_pd_tree_desc[] = {
-       PLAT_ARM_CLUSTER_COUNT,
-       CSS_SGI_MAX_CPUS_PER_CLUSTER,
-       CSS_SGI_MAX_CPUS_PER_CLUSTER
-};
-
-/* RD-E1-Edge platform consists of 16 physical CPUS and 32 threads */
-const unsigned char rd_e1_edge_pd_tree_desc[] = {
-       PLAT_ARM_CLUSTER_COUNT,
-       CSS_SGI_MAX_CPUS_PER_CLUSTER,
-       CSS_SGI_MAX_CPUS_PER_CLUSTER,
-       CSS_SGI_MAX_PE_PER_CPU,
-       CSS_SGI_MAX_PE_PER_CPU,
-       CSS_SGI_MAX_PE_PER_CPU,
-       CSS_SGI_MAX_PE_PER_CPU,
-       CSS_SGI_MAX_PE_PER_CPU,
-       CSS_SGI_MAX_PE_PER_CPU,
-       CSS_SGI_MAX_PE_PER_CPU,
-       CSS_SGI_MAX_PE_PER_CPU,
-       CSS_SGI_MAX_PE_PER_CPU,
-       CSS_SGI_MAX_PE_PER_CPU,
-       CSS_SGI_MAX_PE_PER_CPU,
-       CSS_SGI_MAX_PE_PER_CPU,
-       CSS_SGI_MAX_PE_PER_CPU,
-       CSS_SGI_MAX_PE_PER_CPU,
-       CSS_SGI_MAX_PE_PER_CPU,
-       CSS_SGI_MAX_PE_PER_CPU
-};
-
-/*******************************************************************************
- * This function returns the topology tree information.
- ******************************************************************************/
-const unsigned char *plat_get_power_domain_tree_desc(void)
-{
-       if (sgi_plat_info.platform_id == RD_N1E1_EDGE_SID_VER_PART_NUM &&
-           sgi_plat_info.config_id == RD_E1_EDGE_CONFIG_ID)
-               return rd_e1_edge_pd_tree_desc;
-       else
-               return sgi_pd_tree_desc;
-}
-
 /*******************************************************************************
  * This function returns the core count within the cluster corresponding to
  * `mpidr`.
@@ -66,15 +18,7 @@ unsigned int plat_arm_get_cluster_core_count(u_register_t mpidr)
        return CSS_SGI_MAX_CPUS_PER_CLUSTER;
 }
 
-/*******************************************************************************
- * The array mapping platform core position (implemented by plat_my_core_pos())
- * to the SCMI power domain ID implemented by SCP.
- ******************************************************************************/
-const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[32] = {
-       0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,           \
-       16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31
-};
-
+#if ARM_PLAT_MT
 /******************************************************************************
  * Return the number of PE's supported by the CPU.
  *****************************************************************************/
@@ -82,3 +26,4 @@ unsigned int plat_arm_get_cpu_pe_count(u_register_t mpidr)
 {
        return CSS_SGI_MAX_PE_PER_CPU;
 }
+#endif