dt-bindings: riscv: update microchip.yaml's maintainership

Daire and I are the platform maintainers for Microchip's RISC-V
FPGAs. Update the maintainers in microchip.yaml to reflect this and
explicitly add the binding to the SoC's MAINTAINERS entry.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20221010221704.2161221-3-conor@kernel.org/
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

diff --git a/Documentation/devicetree/bindings/riscv/microchip.yaml b/Documentation/devicetree/bindings/riscv/microchip.yaml
index 1aa7336a9672f6c1c4248ee724cba1f4bc2042c5..9faf8447332bf1a632c733e074b2fba5f543dea6 100644 (file)
--- a/Documentation/devicetree/bindings/riscv/microchip.yaml
+++ b/Documentation/devicetree/bindings/riscv/microchip.yaml
@@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
 title: Microchip PolarFire SoC-based boards device tree bindings
 
 maintainers:
-  - Cyril Jean <Cyril.Jean@microchip.com>
-  - Lewis Hanly <lewis.hanly@microchip.com>
+  - Conor Dooley <conor.dooley@microchip.com>
+  - Daire McNamara <daire.mcnamara@microchip.com>
 
 description:
   Microchip PolarFire SoC-based boards

diff --git a/MAINTAINERS b/MAINTAINERS
index 94cf47ea5f806d9ff8a58cd7e5f17c46bb93ba26..b3415857a812cb12f8a712b36a92a1ced274c9bc 100644 (file)
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -17651,6 +17651,7 @@ F:      Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml
 F:     Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml
 F:     Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml
 F:     Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml
+F:     Documentation/devicetree/bindings/riscv/microchip.yaml
 F:     Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml
 F:     Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml
 F:     Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml